Lines Matching refs:Rn
74 // The instruction has an Rn register operand.
76 // it doesn't have a Rn operand.
433 bits<4> Rn;
437 let Inst{19-16} = Rn;
457 : AI<oops, iops, MiscFrm, NoItinerary, opc, "\t$Rt, $Rt2, [$Rn]", pattern> {
460 bits<4> Rn;
464 let Inst{19-16} = Rn;
532 bits<4> Rn;
535 let Inst{19-16} = Rn;
546 // {17-14} Rn
570 let Inst{19-16} = addr{12-9}; // Rn
599 // {12-9} Rn
610 let Inst{19-16} = addr{12-9}; // Rn
626 bits<4> Rn;
630 let Inst{19-16} = Rn;
650 let Inst{19-16} = addr{12-9}; // Rn
691 // {12-9} Rn
704 let Inst{19-16} = addr{12-9}; // Rn
732 bits<4> Rn;
736 let Inst{19-16} = Rn;
763 bits<4> Rn;
770 let Inst{3-0} = Rn;
785 bits<4> Rn;
793 let Inst{3-0} = Rn;
855 bits<4> Rn;
859 let Inst{19-16} = Rn;
967 "$Rn = $Rdn", pattern>;
989 "$Rn = $Rdn", pattern>;
1047 let Inst{5-3} = addr{2-0}; // Rn
1058 let Inst{5-3} = addr{2-0}; // Rn
1211 bits<4> Rn;
1213 let Inst{19-16} = Rn{3-0};
1292 let Inst{19-16} = addr{12-9}; // Rn
1318 let Inst{19-16} = addr{12-9}; // Rn
1349 bits<4> Rn;
1353 let Inst{19-16} = Rn;
1369 bits<4> Rn;
1373 let Inst{19-16} = Rn;
1614 bits<6> Rn;
1619 let Inst{19-16} = Rn{3-0};