Lines Matching refs:Rn
189 bits<4> Rn;
201 bits<4> Rn;
204 let Inst{19-16} = Rn;
240 bits<4> Rn;
243 let Inst{19-16} = Rn;
273 bits<4> Rn;
276 let Inst{19-16} = Rn;
285 bits<4> Rn;
289 let Inst{19-16} = Rn;
299 bits<4> Rn;
303 let Inst{19-16} = Rn;
339 bits<4> Rn;
343 let Inst{19-16} = Rn;
351 bits<4> Rn;
355 let Inst{19-16} = Rn;
363 bits<4> Rn;
367 let Inst{19-16} = Rn;
378 bits<4> Rn;
382 let Inst{19-16} = Rn;
393 bits<4> Rn;
397 let Inst{19-16} = Rn;
409 bits<4> Rn;
414 let Inst{19-16} = Rn;
437 let Inst{19-16} = 0b1111; // Rn
447 let Inst{19-16} = 0b1111; // Rn
459 let Inst{19-16} = 0b1111; // Rn
472 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), iii,
473 opc, "\t$Rd, $Rn, $imm",
474 [(set rGPR:$Rd, (opnode rGPR:$Rn, t2_so_imm:$imm))]> {
481 def rr : T2sThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), iir,
482 opc, !strconcat(wide, "\t$Rd, $Rn, $Rm"),
483 [(set rGPR:$Rd, (opnode rGPR:$Rn, rGPR:$Rm))]> {
494 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm), iis,
495 opc, !strconcat(wide, "\t$Rd, $Rn, $ShiftedRm"),
496 [(set rGPR:$Rd, (opnode rGPR:$Rn, t2_so_reg:$ShiftedRm))]> {
533 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), IIC_iALUi,
534 opc, ".w\t$Rd, $Rn, $imm",
535 [(set rGPR:$Rd, (opnode t2_so_imm:$imm, rGPR:$Rn))]> {
543 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUr,
544 opc, "\t$Rd, $Rn, $Rm",
555 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm),
556 IIC_iALUsir, opc, "\t$Rd, $Rn, $ShiftedRm",
557 [(set rGPR:$Rd, (opnode t2_so_reg:$ShiftedRm, rGPR:$Rn))]> {
572 (outs rGPR:$Rd), (ins GPR:$Rn, t2_so_imm:$imm), iii,
573 !strconcat(opc, "s"), ".w\t$Rd, $Rn, $imm",
574 [(set rGPR:$Rd, (opnode GPR:$Rn, t2_so_imm:$imm))]> {
583 (outs rGPR:$Rd), (ins GPR:$Rn, rGPR:$Rm), iir,
584 !strconcat(opc, "s"), ".w\t$Rd, $Rn, $Rm",
585 [(set rGPR:$Rd, (opnode GPR:$Rn, rGPR:$Rm))]> {
597 (outs rGPR:$Rd), (ins GPR:$Rn, t2_so_reg:$ShiftedRm), iis,
598 !strconcat(opc, "s"), ".w\t$Rd, $Rn, $ShiftedRm",
599 [(set rGPR:$Rd, (opnode GPR:$Rn, t2_so_reg:$ShiftedRm))]> {
617 (outs rGPR:$Rd), (ins GPR:$Rn, t2_so_imm:$imm), IIC_iALUi,
618 opc, ".w\t$Rd, $Rn, $imm",
619 [(set rGPR:$Rd, (opnode GPR:$Rn, t2_so_imm:$imm))]> {
629 (outs rGPR:$Rd), (ins GPR:$Rn, imm0_4095:$imm), IIC_iALUi,
630 !strconcat(opc, "w"), "\t$Rd, $Rn, $imm",
631 [(set rGPR:$Rd, (opnode GPR:$Rn, imm0_4095:$imm))]> {
633 bits<4> Rn;
640 let Inst{19-16} = Rn;
647 def rr : T2sThreeReg<(outs rGPR:$Rd), (ins GPR:$Rn, rGPR:$Rm), IIC_iALUr,
648 opc, ".w\t$Rd, $Rn, $Rm",
649 [(set rGPR:$Rd, (opnode GPR:$Rn, rGPR:$Rm))]> {
661 (outs rGPR:$Rd), (ins GPR:$Rn, t2_so_reg:$ShiftedRm),
662 IIC_iALUsi, opc, ".w\t$Rd, $Rn, $ShiftedRm",
663 [(set rGPR:$Rd, (opnode GPR:$Rn, t2_so_reg:$ShiftedRm))]> {
678 def ri : T2sTwoRegImm<(outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm),
679 IIC_iALUi, opc, "\t$Rd, $Rn, $imm",
680 [(set rGPR:$Rd, (opnode rGPR:$Rn, t2_so_imm:$imm))]>,
688 def rr : T2sThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUr,
689 opc, ".w\t$Rd, $Rn, $Rm",
690 [(set rGPR:$Rd, (opnode rGPR:$Rn, rGPR:$Rm))]>,
702 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm),
703 IIC_iALUsi, opc, ".w\t$Rd, $Rn, $ShiftedRm",
704 [(set rGPR:$Rd, (opnode rGPR:$Rn, t2_so_reg:$ShiftedRm))]>,
718 def ri : t2PseudoInst<(outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm),
720 [(set rGPR:$Rd, (opnode rGPR:$Rn, t2_so_imm:$imm))]>;
722 def rr : t2PseudoInst<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
724 [(set rGPR:$Rd, (opnode rGPR:$Rn, rGPR:$Rm))]> {
729 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm),
731 [(set rGPR:$Rd, (opnode rGPR:$Rn, t2_so_reg:$ShiftedRm))]>;
741 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), IIC_iALUi,
742 !strconcat(opc, "s"), ".w\t$Rd, $Rn, $imm",
743 [(set rGPR:$Rd, (opnode t2_so_imm:$imm, rGPR:$Rn))]> {
752 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm),
753 IIC_iALUsi, !strconcat(opc, "s"), "\t$Rd, $Rn, $ShiftedRm",
754 [(set rGPR:$Rd, (opnode t2_so_reg:$ShiftedRm, rGPR:$Rn))]> {
773 let Inst{19-16} = 0b1111; // Rn
778 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMOVsr,
779 opc, ".w\t$Rd, $Rn, $Rm",
780 [(set rGPR:$Rd, (opnode rGPR:$Rn, rGPR:$Rm))]> {
798 (outs), (ins GPR:$Rn, t2_so_imm:$imm), iii,
799 opc, ".w\t$Rn, $imm",
800 [(opnode GPR:$Rn, t2_so_imm:$imm)]> {
824 (outs), (ins GPR:$Rn, t2_so_reg:$ShiftedRm), iis,
825 opc, ".w\t$Rn, $ShiftedRm",
826 [(opnode GPR:$Rn, t2_so_reg:$ShiftedRm)]> {
854 let Inst{19-16} = addr{16-13}; // Rn
876 let Inst{19-16} = addr{12-9}; // Rn
895 let Inst{19-16} = addr{9-6}; // Rn
911 let Inst{19-16} = 0b1111; // Rn
935 let Inst{19-16} = addr{16-13}; // Rn
955 let Inst{19-16} = addr{12-9}; // Rn
972 let Inst{19-16} = addr{9-6}; // Rn
987 let Inst{19-16} = 0b1111; // Rn
998 let Inst{19-16} = 0b1111; // Rn
1016 let Inst{19-16} = 0b1111; // Rn
1028 let Inst{19-16} = 0b1111; // Rn
1046 let Inst{19-16} = 0b1111; // Rn
1057 let Inst{19-16} = 0b1111; // Rn
1069 def rr : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iEXTAr,
1070 opc, "\t$Rd, $Rn, $Rm",
1071 [(set rGPR:$Rd, (opnode rGPR:$Rn, rGPR:$Rm))]>,
1081 (ins rGPR:$Rn, rGPR:$Rm, rot_imm:$rot),
1082 IIC_iEXTAsr, opc, "\t$Rd, $Rn, $Rm, ror $rot",
1083 [(set rGPR:$Rd, (opnode rGPR:$Rn,
1100 def rr : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iEXTAr,
1101 opc, "\t$Rd, $Rn, $Rm", []> {
1109 def rr_rot :T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, i32imm:$rot),
1110 IIC_iEXTAsr, opc, "\t$Rd, $Rn, $Rm, ror $rot", []> {
1152 let Inst{19-16} = 0b1111; // Rn
1250 def t2LDR_PRE : T2Iidxldst<0, 0b10, 1, 1, (outs GPR:$Rt, GPR:$Rn),
1253 "ldr", "\t$Rt, $addr!", "$addr.base = $Rn",
1256 def t2LDR_POST : T2Iidxldst<0, 0b10, 1, 0, (outs GPR:$Rt, GPR:$Rn),
1259 "ldr", "\t$Rt, [$Rn], $addr", "$base = $Rn",
1262 def t2LDRB_PRE : T2Iidxldst<0, 0b00, 1, 1, (outs GPR:$Rt, GPR:$Rn),
1265 "ldrb", "\t$Rt, $addr!", "$addr.base = $Rn",
1267 def t2LDRB_POST : T2Iidxldst<0, 0b00, 1, 0, (outs GPR:$Rt, GPR:$Rn),
1270 "ldrb", "\t$Rt, [$Rn], $addr", "$base = $Rn",
1273 def t2LDRH_PRE : T2Iidxldst<0, 0b01, 1, 1, (outs GPR:$Rt, GPR:$Rn),
1276 "ldrh", "\t$Rt, $addr!", "$addr.base = $Rn",
1278 def t2LDRH_POST : T2Iidxldst<0, 0b01, 1, 0, (outs GPR:$Rt, GPR:$Rn),
1281 "ldrh", "\t$Rt, [$Rn], $addr", "$base = $Rn",
1284 def t2LDRSB_PRE : T2Iidxldst<1, 0b00, 1, 1, (outs GPR:$Rt, GPR:$Rn),
1287 "ldrsb", "\t$Rt, $addr!", "$addr.base = $Rn",
1289 def t2LDRSB_POST : T2Iidxldst<1, 0b00, 1, 0, (outs GPR:$Rt, GPR:$Rn),
1292 "ldrsb", "\t$Rt, [$Rn], $addr", "$base = $Rn",
1295 def t2LDRSH_PRE : T2Iidxldst<1, 0b01, 1, 1, (outs GPR:$Rt, GPR:$Rn),
1298 "ldrsh", "\t$Rt, $addr!", "$addr.base = $Rn",
1300 def t2LDRSH_POST : T2Iidxldst<1, 0b01, 1, 0, (outs GPR:$dst, GPR:$Rn),
1303 "ldrsh", "\t$dst, [$Rn], $addr", "$base = $Rn",
1351 (ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
1353 "str", "\t$Rt, [$Rn, $addr]!",
1354 "$Rn = $base_wb,@earlyclobber $base_wb",
1356 (pre_store GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
1359 (ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
1361 "str", "\t$Rt, [$Rn], $addr",
1362 "$Rn = $base_wb,@earlyclobber $base_wb",
1364 (post_store GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
1367 (ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
1369 "strh", "\t$Rt, [$Rn, $addr]!",
1370 "$Rn = $base_wb,@earlyclobber $base_wb",
1372 (pre_truncsti16 GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
1375 (ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
1377 "strh", "\t$Rt, [$Rn], $addr",
1378 "$Rn = $base_wb,@earlyclobber $base_wb",
1380 (post_truncsti16 GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
1383 (ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
1385 "strb", "\t$Rt, [$Rn, $addr]!",
1386 "$Rn = $base_wb,@earlyclobber $base_wb",
1388 (pre_truncsti8 GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
1391 (ins GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr),
1393 "strb", "\t$Rt, [$Rn], $addr",
1394 "$Rn = $base_wb,@earlyclobber $base_wb",
1396 (post_truncsti8 GPR:$Rt, GPR:$Rn, t2am_imm8_offset:$addr))]>;
1461 let Inst{19-16} = addr{16-13}; // Rn
1479 let Inst{19-16} = addr{12-9}; // Rn
1496 let Inst{19-16} = addr{9-6}; // Rn
1513 T2XI<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
1514 itin, !strconcat(asm, "ia${p}.w\t$Rn, $regs"), []> {
1515 bits<4> Rn;
1524 let Inst{19-16} = Rn;
1528 T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
1529 itin_upd, !strconcat(asm, "ia${p}.w\t$Rn!, $regs"), "$Rn = $wb", []> {
1530 bits<4> Rn;
1539 let Inst{19-16} = Rn;
1543 T2XI<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
1544 itin, !strconcat(asm, "db${p}.w\t$Rn, $regs"), []> {
1545 bits<4> Rn;
1554 let Inst{19-16} = Rn;
1558 T2XIt<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),
1559 itin_upd, !strconcat(asm, "db${p}.w\t$Rn, $regs"), "$Rn = $wb", []> {
1560 bits<4> Rn;
1569 let Inst{19-16} = Rn;
1595 let Inst{19-16} = 0b1111; // Rn
1609 let Inst{19-16} = 0b1111; // Rn
1783 def t2SEL : T2ThreeReg<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm),
1784 NoItinerary, "sel", "\t$Rd, $Rn, $Rm", []>,
1799 dag iops = (ins rGPR:$Rn, rGPR:$Rm),
1800 string asm = "\t$Rd, $Rn, $Rm">
1810 bits<4> Rn;
1814 let Inst{19-16} = Rn;
1821 [(set rGPR:$Rd, (int_arm_qadd rGPR:$Rn, rGPR:$Rm))],
1822 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
1827 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
1829 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
1832 [(set rGPR:$Rd, (int_arm_qsub rGPR:$Rn, rGPR:$Rm))],
1833 (ins rGPR:$Rm, rGPR:$Rn), "\t$Rd, $Rm, $Rn">;
1899 (ins rGPR:$Rn, rGPR:$Rm),
1900 NoItinerary, "usad8", "\t$Rd, $Rn, $Rm", []>,
1905 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), NoItinerary,
1906 "usada8", "\t$Rd, $Rn, $Rm, $Ra", []>,
1915 bits<4> Rn;
1920 let Inst{19-16} = Rn;
1928 (outs rGPR:$Rd), (ins ssat_imm:$sat_imm, rGPR:$Rn, shift_imm:$sh),
1929 NoItinerary, "ssat", "\t$Rd, $sat_imm, $Rn$sh",
1938 (outs rGPR:$Rd), (ins ssat_imm:$sat_imm, rGPR:$Rn), NoItinerary,
1939 "ssat16", "\t$Rd, $sat_imm, $Rn",
1952 (outs rGPR:$Rd), (ins i32imm:$sat_imm, rGPR:$Rn, shift_imm:$sh),
1953 NoItinerary, "usat", "\t$Rd, $sat_imm, $Rn$sh",
1961 def t2USAT16: T2SatI<(outs rGPR:$dst), (ins i32imm:$sat_imm, rGPR:$Rn),
1963 "usat16", "\t$dst, $sat_imm, $Rn",
1998 let Inst{19-16} = 0b1111; // Rn
2013 let Inst{19-16} = 0b1111; // Rn
2027 let Inst{19-16} = 0b1111; // Rn
2070 bits<4> Rn;
2072 let Inst{19-16} = Rn;
2083 let Inst{19-16} = 0b1111; // Rn
2093 (outs rGPR:$Rd), (ins rGPR:$Rn, imm0_31:$lsb, imm0_31_m1:$msb),
2094 IIC_iUNAsi, "sbfx", "\t$Rd, $Rn, $lsb, $msb", []> {
2102 (outs rGPR:$Rd), (ins rGPR:$Rn, imm0_31:$lsb, imm0_31_m1:$msb),
2103 IIC_iUNAsi, "ubfx", "\t$Rd, $Rn, $lsb, $msb", []> {
2113 (ins rGPR:$src, rGPR:$Rn, bf_inv_mask_imm:$imm),
2114 IIC_iBITi, "bfi", "\t$Rd, $Rn, $imm",
2115 [(set rGPR:$Rd, (ARMbfi rGPR:$src, rGPR:$Rn,
2132 (ins rGPR:$src, rGPR:$Rn, lsb_pos_imm:$lsbit,
2134 IIC_iBITi, "bfi", "\t$Rd, $Rn, $lsbit, $width",
2178 def t2MUL: T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32,
2179 "mul", "\t$Rd, $Rn, $Rm",
2180 [(set rGPR:$Rd, (mul rGPR:$Rn, rGPR:$Rm))]> {
2189 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2190 "mla", "\t$Rd, $Rn, $Rm, $Ra",
2191 [(set rGPR:$Rd, (add (mul rGPR:$Rn, rGPR:$Rm), rGPR:$Ra))]> {
2199 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2200 "mls", "\t$Rd, $Rn, $Rm, $Ra",
2201 [(set rGPR:$Rd, (sub rGPR:$Ra, (mul rGPR:$Rn, rGPR:$Rm)))]> {
2213 (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64,
2214 "smull", "\t$Rd, $Ra, $Rn, $Rm", []>;
2218 (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL64,
2219 "umull", "\t$RdLo, $RdHi, $Rn, $Rm", []>;
2225 (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64,
2226 "smlal", "\t$RdLo, $RdHi, $Rn, $Rm", []>;
2230 (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64,
2231 "umlal", "\t$RdLo, $RdHi, $Rn, $Rm", []>;
2235 (ins rGPR:$Rn, rGPR:$Rm), IIC_iMAC64,
2236 "umaal", "\t$RdLo, $RdHi, $Rn, $Rm", []>,
2243 def t2SMMUL : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32,
2244 "smmul", "\t$Rd, $Rn, $Rm",
2245 [(set rGPR:$Rd, (mulhs rGPR:$Rn, rGPR:$Rm))]>,
2254 def t2SMMULR : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL32,
2255 "smmulr", "\t$Rd, $Rn, $Rm", []>,
2265 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2266 "smmla", "\t$Rd, $Rn, $Rm, $Ra",
2267 [(set rGPR:$Rd, (add (mulhs rGPR:$Rm, rGPR:$Rn), rGPR:$Ra))]>,
2276 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2277 "smmlar", "\t$Rd, $Rn, $Rm, $Ra", []>,
2286 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2287 "smmls", "\t$Rd, $Rn, $Rm, $Ra",
2288 [(set rGPR:$Rd, (sub rGPR:$Ra, (mulhs rGPR:$Rn, rGPR:$Rm)))]>,
2297 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32,
2298 "smmlsr", "\t$Rd, $Rn, $Rm, $Ra", []>,
2307 def BB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2308 !strconcat(opc, "bb"), "\t$Rd, $Rn, $Rm",
2309 [(set rGPR:$Rd, (opnode (sext_inreg rGPR:$Rn, i16),
2320 def BT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2321 !strconcat(opc, "bt"), "\t$Rd, $Rn, $Rm",
2322 [(set rGPR:$Rd, (opnode (sext_inreg rGPR:$Rn, i16),
2333 def TB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2334 !strconcat(opc, "tb"), "\t$Rd, $Rn, $Rm",
2335 [(set rGPR:$Rd, (opnode (sra rGPR:$Rn, (i32 16)),
2346 def TT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2347 !strconcat(opc, "tt"), "\t$Rd, $Rn, $Rm",
2348 [(set rGPR:$Rd, (opnode (sra rGPR:$Rn, (i32 16)),
2359 def WB : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2360 !strconcat(opc, "wb"), "\t$Rd, $Rn, $Rm",
2361 [(set rGPR:$Rd, (sra (opnode rGPR:$Rn,
2372 def WT : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iMUL16,
2373 !strconcat(opc, "wt"), "\t$Rd, $Rn, $Rm",
2374 [(set rGPR:$Rd, (sra (opnode rGPR:$Rn,
2389 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2390 !strconcat(opc, "bb"), "\t$Rd, $Rn, $Rm, $Ra",
2392 (opnode (sext_inreg rGPR:$Rn, i16),
2403 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2404 !strconcat(opc, "bt"), "\t$Rd, $Rn, $Rm, $Ra",
2405 [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sext_inreg rGPR:$Rn, i16),
2416 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2417 !strconcat(opc, "tb"), "\t$Rd, $Rn, $Rm, $Ra",
2418 [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sra rGPR:$Rn, (i32 16)),
2429 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2430 !strconcat(opc, "tt"), "\t$Rd, $Rn, $Rm, $Ra",
2431 [(set rGPR:$Rd, (add rGPR:$Ra, (opnode (sra rGPR:$Rn, (i32 16)),
2442 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2443 !strconcat(opc, "wb"), "\t$Rd, $Rn, $Rm, $Ra",
2444 [(set rGPR:$Rd, (add rGPR:$Ra, (sra (opnode rGPR:$Rn,
2455 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC16,
2456 !strconcat(opc, "wt"), "\t$Rd, $Rn, $Rm, $Ra",
2457 [(set rGPR:$Rd, (add rGPR:$Ra, (sra (opnode rGPR:$Rn,
2473 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlalbb", "\t$Ra, $Rd, $Rn, $Rm",
2477 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlalbt", "\t$Ra, $Rd, $Rn, $Rm",
2481 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaltb", "\t$Ra, $Rd, $Rn, $Rm",
2485 (ins rGPR:$Rn,rGPR:$Rm), IIC_iMAC64, "smlaltt", "\t$Ra, $Rd, $Rn, $Rm",
2493 0, 0b010, 0b0000, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2494 IIC_iMAC32, "smuad", "\t$Rd, $Rn, $Rm", []>,
2499 0, 0b010, 0b0001, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2500 IIC_iMAC32, "smuadx", "\t$Rd, $Rn, $Rm", []>,
2505 0, 0b100, 0b0000, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2506 IIC_iMAC32, "smusd", "\t$Rd, $Rn, $Rm", []>,
2511 0, 0b100, 0b0001, (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm),
2512 IIC_iMAC32, "smusdx", "\t$Rd, $Rn, $Rm", []>,
2518 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "smlad",
2519 "\t$Rd, $Rn, $Rm, $Ra", []>,
2523 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "smladx",
2524 "\t$Rd, $Rn, $Rm, $Ra", []>,
2527 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "smlsd",
2528 "\t$Rd, $Rn, $Rm, $Ra", []>,
2531 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, "smlsdx",
2532 "\t$Rd, $Rn, $Rm, $Ra", []>,
2535 (ins rGPR:$Rm, rGPR:$Rn), IIC_iMAC64, "smlald",
2536 "\t$Ra, $Rd, $Rm, $Rn", []>,
2539 (ins rGPR:$Rm,rGPR:$Rn), IIC_iMAC64, "smlaldx",
2540 "\t$Ra, $Rd, $Rm, $Rn", []>,
2543 (ins rGPR:$Rm,rGPR:$Rn), IIC_iMAC64, "smlsld",
2544 "\t$Ra, $Rd, $Rm, $Rn", []>,
2547 (ins rGPR:$Rm,rGPR:$Rn), IIC_iMAC64, "smlsldx",
2548 "\t$Ra, $Rd, $Rm, $Rn", []>,
2555 def t2SDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUi,
2556 "sdiv", "\t$Rd, $Rn, $Rm",
2557 [(set rGPR:$Rd, (sdiv rGPR:$Rn, rGPR:$Rm))]>,
2566 def t2UDIV : T2ThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUi,
2567 "udiv", "\t$Rd, $Rn, $Rm",
2568 [(set rGPR:$Rd, (udiv rGPR:$Rn, rGPR:$Rm))]>,
2590 let Rn{3-0} = Rm;
2616 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, shift_imm:$sh),
2617 IIC_iBITsi, "pkhbt", "\t$Rd, $Rn, $Rm$sh",
2618 [(set rGPR:$Rd, (or (and rGPR:$Rn, 0xFFFF),
2644 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, shift_imm:$sh),
2645 IIC_iBITsi, "pkhtb", "\t$Rd, $Rn, $Rm$sh",
2646 [(set rGPR:$Rd, (or (and rGPR:$Rn, 0xFFFF0000),
2761 let Inst{19-16} = 0b1111; // Rn
2772 let Inst{19-16} = 0b1111; // Rn
2981 def t2LDMIA_RET: t2PseudoExpand<(outs GPR:$wb), (ins GPR:$Rn, pred:$p,
2984 (t2LDMIA_UPD GPR:$wb, GPR:$Rn, pred:$p, reglist:$regs)>,
2985 RegConstraint<"$Rn = $wb">;
3019 def t2TBB : T2I<(outs), (ins GPR:$Rn, GPR:$Rm), IIC_Br,
3020 "tbb", "\t[$Rn, $Rm]", []> {
3021 bits<4> Rn;
3024 let Inst{19-16} = Rn;
3030 def t2TBH : T2I<(outs), (ins GPR:$Rn, GPR:$Rm), IIC_Br,
3031 "tbh", "\t[$Rn, $Rm, lsl #1]", []> {
3032 bits<4> Rn;
3035 let Inst{19-16} = Rn;
3214 bits<4> Rn;
3215 let Inst{19-16} = Rn;
3220 (outs), (ins GPR:$Rn), NoItinerary, "rfedb", "\t$Rn!",
3223 (outs), (ins GPR:$Rn), NoItinerary, "rfedb", "\t$Rn",
3226 (outs), (ins GPR:$Rn), NoItinerary, "rfeia", "\t$Rn!",
3229 (outs), (ins GPR:$Rn), NoItinerary, "rfeia", "\t$Rn",
3316 0 /* op12 */, (outs), (ins msr_mask:$mask, rGPR:$Rn),
3317 NoItinerary, "msr", "\t$mask, $Rn",
3320 bits<4> Rn;
3321 let Inst{19-16} = Rn;