222     unsigned Reg = MO.getReg();  in canAddPseudoFlagDep()
232     unsigned Reg = MO.getReg();  in canAddPseudoFlagDep()
295     unsigned Reg = MO.getReg();  in VerifyLowRegs()
335     if (MI->getOperand(1).getReg() == ARM::SP) {  in ReduceLoadStore()
369     unsigned BaseReg = MI->getOperand(0).getReg();  in ReduceLoadStore()
377       if (MI->getOperand(i).getReg() == BaseReg) {  in ReduceLoadStore()
391     unsigned BaseReg = MI->getOperand(1).getReg();  in ReduceLoadStore()
405     unsigned BaseReg = MI->getOperand(1).getReg();  in ReduceLoadStore()
425     OffsetReg  = MI->getOperand(2).getReg();  in ReduceLoadStore()
484     if (MI->getOperand(1).getReg() != ARM::SP) {  in ReduceSpecial()
496     if (!isARMLowRegister(MI->getOperand(0).getReg()))  in ReduceSpecial()
502         MI->getOperand(MCID.getNumOperands()-1).getReg() == ARM::CPSR)  in ReduceSpecial()
582   unsigned Reg0 = MI->getOperand(0).getReg();  in ReduceTo2Addr()
583   unsigned Reg1 = MI->getOperand(1).getReg();  in ReduceTo2Addr()
588         CommOpIdx1 != 1 || MI->getOperand(CommOpIdx2).getReg() != Reg0)  in ReduceTo2Addr()
602     unsigned Reg2 = MI->getOperand(2).getReg();  in ReduceTo2Addr()
625     HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);  in ReduceTo2Addr()
686       unsigned Reg = MO.getReg();  in ReduceToNarrow()
715     HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);  in ReduceToNarrow()
752     if (MO.isReg() && MO.isImplicit() && MO.getReg() == ARM::CPSR)  in ReduceToNarrow()
777     if (MO.getReg() != ARM::CPSR)  in UpdateCPSRDef()
793     if (MO.getReg() != ARM::CPSR)  in UpdateCPSRUse()