Lines Matching refs:SDNode

19 def SPUshufmask    : SDNode<"SPUISD::SHUFFLE_MASK", SPU_GenControl, []>;
21 def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_SPUCallSeq,
23 def callseq_end   : SDNode<"ISD::CALLSEQ_END",   SDT_SPUCallSeq,
30 def SPUcall       : SDNode<"SPUISD::CALL", SDT_SPUCall,
80 def SPUcntb : SDNode<"SPUISD::CNTB", SDTIntUnaryOp>;
84 def SPUshuffle: SDNode<"SPUISD::SHUFB", SDT_SPUshuffle, []>;
87 def SPUvec_shl: SDNode<"ISD::SHL", SPUvecshift_type, []>;
88 def SPUvec_srl: SDNode<"ISD::SRL", SPUvecshift_type, []>;
89 def SPUvec_sra: SDNode<"ISD::SRA", SPUvecshift_type, []>;
91 def SPUvec_rotl: SDNode<"SPUISD::VEC_ROTL", SPUvecshift_type, []>;
92 def SPUvec_rotr: SDNode<"SPUISD::VEC_ROTR", SPUvecshift_type, []>;
95 def SPUrotbytes_left: SDNode<"SPUISD::ROTBYTES_LEFT",
101 def SPUrotbytes_left_bits : SDNode<"SPUISD::ROTBYTES_LEFT_BITS",
106 def SPUshlquad_l_bytes: SDNode<"SPUISD::SHL_BYTES", SPUvecshift_type, []>;
107 def SPUshlquad_l_bits: SDNode<"SPUISD::SHL_BITS", SPUvecshift_type, []>;
108 def SPUsrl_bytes: SDNode<"SPUISD::SRL_BYTES", SPUvecshift_type, []>;
111 def SPUselmask: SDNode<"SPUISD::SELECT_MASK", SPUselmask_type, []>;
114 def SPUselb: SDNode<"SPUISD::SELB", SPUselb_type, []>;
117 def SPUprefslot2vec: SDNode<"SPUISD::PREFSLOT2VEC", SDTprefslot2vec, []>;
120 def SPUvec2prefslot: SDNode<"SPUISD::VEC2PREFSLOT", SPU_vec_demote, []>;
123 def SPUhi : SDNode<"SPUISD::Hi", SDTIntBinOp, []>;
124 def SPUlo : SDNode<"SPUISD::Lo", SDTIntBinOp, []>;
127 def SPUpcrel : SDNode<"SPUISD::PCRelAddr", SDTIntBinOp, []>;
130 def SPUaform : SDNode<"SPUISD::AFormAddr", SDTIntBinOp, []>;
133 def SPUindirect : SDNode<"SPUISD::IndirectAddr", SDTIntBinOp, []>;
137 def SPUadd64 : SDNode<"SPUISD::ADD64_MARKER", SPUmarker_type, []>;
138 def SPUsub64 : SDNode<"SPUISD::SUB64_MARKER", SPUmarker_type, []>;
139 def SPUmul64 : SDNode<"SPUISD::MUL64_MARKER", SPUmarker_type, []>;
158 def retflag     : SDNode<"SPUISD::RET_FLAG", SDTNone,