Lines Matching refs:DestReg
95 unsigned DestReg, unsigned SrcReg, in copyPhysReg() argument
97 bool DestCPU = Mips::CPURegsRegClass.contains(DestReg); in copyPhysReg()
102 BuildMI(MBB, I, DL, get(Mips::ADDu), DestReg).addReg(Mips::ZERO) in copyPhysReg()
110 BuildMI(MBB, I, DL, get(Mips::CFC1), DestReg) in copyPhysReg()
113 BuildMI(MBB, I, DL, get(Mips::MFC1), DestReg) in copyPhysReg()
116 BuildMI(MBB, I, DL, get(Mips::MFHI), DestReg); in copyPhysReg()
118 BuildMI(MBB, I, DL, get(Mips::MFLO), DestReg); in copyPhysReg()
126 if (Mips::CCRRegClass.contains(DestReg)) in copyPhysReg()
127 BuildMI(MBB, I, DL, get(Mips::CTC1), DestReg) in copyPhysReg()
129 else if (Mips::FGR32RegClass.contains(DestReg)) in copyPhysReg()
130 BuildMI(MBB, I, DL, get(Mips::MTC1), DestReg) in copyPhysReg()
132 else if (DestReg == Mips::HI) in copyPhysReg()
135 else if (DestReg == Mips::LO) in copyPhysReg()
143 if (Mips::FGR32RegClass.contains(DestReg, SrcReg)) { in copyPhysReg()
144 BuildMI(MBB, I, DL, get(Mips::FMOV_S32), DestReg) in copyPhysReg()
149 if (Mips::AFGR64RegClass.contains(DestReg, SrcReg)) { in copyPhysReg()
150 BuildMI(MBB, I, DL, get(Mips::FMOV_D32), DestReg) in copyPhysReg()
155 if (Mips::CCRRegClass.contains(DestReg, SrcReg)) { in copyPhysReg()
156 BuildMI(MBB, I, DL, get(Mips::MOVCCRToCCR), DestReg) in copyPhysReg()
199 unsigned DestReg, int FI, in loadRegFromStackSlot() argument
207 BuildMI(MBB, I, DL, get(Mips::LW), DestReg).addFrameIndex(FI).addImm(0); in loadRegFromStackSlot()
209 BuildMI(MBB, I, DL, get(Mips::LWC1), DestReg).addFrameIndex(FI).addImm(0); in loadRegFromStackSlot()
212 BuildMI(MBB, I, DL, get(Mips::LDC1), DestReg).addFrameIndex(FI).addImm(0); in loadRegFromStackSlot()
216 const unsigned *SubSet = TRI->getSubRegisters(DestReg); in loadRegFromStackSlot()