86 insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const  in insertNoop()  argument
89   BuildMI(MBB, MI, DL, get(Mips::NOP));  in insertNoop()
93 copyPhysReg(MachineBasicBlock &MBB,  in copyPhysReg()  argument
102     BuildMI(MBB, I, DL, get(Mips::ADDu), DestReg).addReg(Mips::ZERO)  in copyPhysReg()
110       BuildMI(MBB, I, DL, get(Mips::CFC1), DestReg)  in copyPhysReg()
113       BuildMI(MBB, I, DL, get(Mips::MFC1), DestReg)  in copyPhysReg()
116       BuildMI(MBB, I, DL, get(Mips::MFHI), DestReg);  in copyPhysReg()
118       BuildMI(MBB, I, DL, get(Mips::MFLO), DestReg);  in copyPhysReg()
127       BuildMI(MBB, I, DL, get(Mips::CTC1), DestReg)  in copyPhysReg()
130       BuildMI(MBB, I, DL, get(Mips::MTC1), DestReg)  in copyPhysReg()
133       BuildMI(MBB, I, DL, get(Mips::MTHI))  in copyPhysReg()
136       BuildMI(MBB, I, DL, get(Mips::MTLO))  in copyPhysReg()
144     BuildMI(MBB, I, DL, get(Mips::FMOV_S32), DestReg)  in copyPhysReg()
150     BuildMI(MBB, I, DL, get(Mips::FMOV_D32), DestReg)  in copyPhysReg()
156     BuildMI(MBB, I, DL, get(Mips::MOVCCRToCCR), DestReg)  in copyPhysReg()
164 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,  in storeRegToStackSlot()  argument
169   if (I != MBB.end()) DL = I->getDebugLoc();  in storeRegToStackSlot()
172     BuildMI(MBB, I, DL, get(Mips::SW)).addReg(SrcReg, getKillRegState(isKill))  in storeRegToStackSlot()
175     BuildMI(MBB, I, DL, get(Mips::SWC1)).addReg(SrcReg, getKillRegState(isKill))  in storeRegToStackSlot()
179       BuildMI(MBB, I, DL, get(Mips::SDC1))  in storeRegToStackSlot()
184         MBB.getParent()->getTarget().getRegisterInfo();  in storeRegToStackSlot()
186       BuildMI(MBB, I, DL, get(Mips::SWC1))  in storeRegToStackSlot()
189       BuildMI(MBB, I, DL, get(Mips::SWC1))  in storeRegToStackSlot()
198 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,  in loadRegFromStackSlot()  argument
204   if (I != MBB.end()) DL = I->getDebugLoc();  in loadRegFromStackSlot()
207     BuildMI(MBB, I, DL, get(Mips::LW), DestReg).addFrameIndex(FI).addImm(0);  in loadRegFromStackSlot()
209     BuildMI(MBB, I, DL, get(Mips::LWC1), DestReg).addFrameIndex(FI).addImm(0);  in loadRegFromStackSlot()
212       BuildMI(MBB, I, DL, get(Mips::LDC1), DestReg).addFrameIndex(FI).addImm(0);  in loadRegFromStackSlot()
215         MBB.getParent()->getTarget().getRegisterInfo();  in loadRegFromStackSlot()
217       BuildMI(MBB, I, DL, get(Mips::LWC1), SubSet[0])  in loadRegFromStackSlot()
219       BuildMI(MBB, I, DL, get(Mips::LWC1), SubSet[1])  in loadRegFromStackSlot()
277 bool MipsInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,  in AnalyzeBranch()  argument
283   MachineBasicBlock::reverse_iterator I = MBB.rbegin(), REnd = MBB.rend();  in AnalyzeBranch()
357 void MipsInstrInfo::BuildCondBr(MachineBasicBlock &MBB,  in BuildCondBr()  argument
363   MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID);  in BuildCondBr()
372 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,  in InsertBranch()  argument
389     BuildCondBr(MBB, TBB, DL, Cond);  in InsertBranch()
390     BuildMI(&MBB, DL, get(Mips::J)).addMBB(FBB);  in InsertBranch()
397     BuildMI(&MBB, DL, get(Mips::J)).addMBB(TBB);  in InsertBranch()
399     BuildCondBr(MBB, TBB, DL, Cond);  in InsertBranch()
404 RemoveBranch(MachineBasicBlock &MBB) const  in RemoveBranch()
406   MachineBasicBlock::reverse_iterator I = MBB.rbegin(), REnd = MBB.rend();  in RemoveBranch()
422   MBB.erase(I.base(), FirstBr.base());  in RemoveBranch()