Lines Matching refs:Pat

661 def : Pat<(i32 immSExt16:$in),
663 def : Pat<(i32 immZExt16:$in),
667 def : Pat<(i32 imm:$imm),
671 def : Pat<(subc CPURegs:$lhs, CPURegs:$rhs),
673 def : Pat<(addc CPURegs:$lhs, CPURegs:$rhs),
675 def : Pat<(addc  CPURegs:$src, immSExt16:$imm),
679 def : Pat<(MipsJmpLink (i32 tglobaladdr:$dst)),
681 def : Pat<(MipsJmpLink (i32 texternalsym:$dst)),
683 //def : Pat<(MipsJmpLink CPURegs:$dst),
687 def : Pat<(MipsHi tglobaladdr:$in), (LUi tglobaladdr:$in)>;
688 def : Pat<(MipsHi tblockaddress:$in), (LUi tblockaddress:$in)>;
689 def : Pat<(add CPURegs:$hi, (MipsLo tglobaladdr:$lo)),
691 def : Pat<(add CPURegs:$hi, (MipsLo tblockaddress:$lo)),
694 def : Pat<(MipsHi tjumptable:$in), (LUi tjumptable:$in)>;
695 def : Pat<(add CPURegs:$hi, (MipsLo tjumptable:$lo)),
698 def : Pat<(MipsHi tconstpool:$in), (LUi tconstpool:$in)>;
699 def : Pat<(add CPURegs:$hi, (MipsLo tconstpool:$lo)),
703 def : Pat<(add CPURegs:$gp, (MipsGPRel tglobaladdr:$in)),
705 def : Pat<(add CPURegs:$gp, (MipsGPRel tconstpool:$in)),
709 def : Pat<(add CPURegs:$gp, (MipsTlsGd tglobaltlsaddr:$in)),
713 def : Pat<(MipsTprelHi tglobaltlsaddr:$in), (LUi tglobaltlsaddr:$in)>;
714 def : Pat<(add CPURegs:$hi, (MipsTprelLo tglobaltlsaddr:$lo)),
719       Pat<(MipsWrapperPIC node:$in),
729 def : Pat<(not CPURegs:$in),
733 def : Pat<(extloadi1  addr:$src), (LBu addr:$src)>;
734 def : Pat<(extloadi8  addr:$src), (LBu addr:$src)>;
735 def : Pat<(extloadi16 addr:$src), (LHu addr:$src)>;
738 def : Pat<(store (i32 0), addr:$dst), (SW ZERO, addr:$dst)>;
741 def : Pat<(brcond (setne CPURegs:$lhs, 0), bb:$dst),
743 def : Pat<(brcond (seteq CPURegs:$lhs, 0), bb:$dst),
746 def : Pat<(brcond (setge CPURegs:$lhs, CPURegs:$rhs), bb:$dst),
748 def : Pat<(brcond (setuge CPURegs:$lhs, CPURegs:$rhs), bb:$dst),
750 def : Pat<(brcond (setge CPURegs:$lhs, immSExt16:$rhs), bb:$dst),
752 def : Pat<(brcond (setuge CPURegs:$lhs, immSExt16:$rhs), bb:$dst),
755 def : Pat<(brcond (setle CPURegs:$lhs, CPURegs:$rhs), bb:$dst),
757 def : Pat<(brcond (setule CPURegs:$lhs, CPURegs:$rhs), bb:$dst),
760 def : Pat<(brcond CPURegs:$cond, bb:$dst),
765   def : Pat<(select (setge CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F),
767   def : Pat<(select (setuge CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F),
769   def : Pat<(select (setge CPURegs:$lhs, immSExt16:$rhs), RC:$T, RC:$F),
771   def : Pat<(select (setuge CPURegs:$lh, immSExt16:$rh), RC:$T, RC:$F),
773   def : Pat<(select (setle CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F),
775   def : Pat<(select (setule CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F),
777   def : Pat<(select (seteq CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F),
779   def : Pat<(select (seteq CPURegs:$lhs, 0), RC:$T, RC:$F),
784   def : Pat<(select (setne CPURegs:$lhs, CPURegs:$rhs), RC:$T, RC:$F),
786   def : Pat<(select CPURegs:$cond, RC:$T, RC:$F),
788   def : Pat<(select (setne CPURegs:$lhs, 0), RC:$T, RC:$F),
796 def : Pat<(seteq CPURegs:$lhs, CPURegs:$rhs),
798 def : Pat<(setne CPURegs:$lhs, CPURegs:$rhs),
801 def : Pat<(setle CPURegs:$lhs, CPURegs:$rhs),
803 def : Pat<(setule CPURegs:$lhs, CPURegs:$rhs),
806 def : Pat<(setgt CPURegs:$lhs, CPURegs:$rhs),
808 def : Pat<(setugt CPURegs:$lhs, CPURegs:$rhs),
811 def : Pat<(setge CPURegs:$lhs, CPURegs:$rhs),
813 def : Pat<(setuge CPURegs:$lhs, CPURegs:$rhs),
816 def : Pat<(setge CPURegs:$lhs, immSExt16:$rhs),
818 def : Pat<(setuge CPURegs:$lhs, immSExt16:$rhs),
822 def : Pat<(MipsDynAlloc addr:$f), (DynAlloc addr:$f)>;