Lines Matching refs:dst
41 def MOVSX16rr8 : I<0xBE, MRMSrcReg, (outs GR16:$dst), (ins GR8:$src),
42 "movs{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
43 def MOVSX16rm8 : I<0xBE, MRMSrcMem, (outs GR16:$dst), (ins i8mem:$src),
44 "movs{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
45 def MOVSX32rr8 : I<0xBE, MRMSrcReg, (outs GR32:$dst), (ins GR8:$src),
46 "movs{bl|x}\t{$src, $dst|$dst, $src}",
47 [(set GR32:$dst, (sext GR8:$src))]>, TB;
48 def MOVSX32rm8 : I<0xBE, MRMSrcMem, (outs GR32:$dst), (ins i8mem :$src),
49 "movs{bl|x}\t{$src, $dst|$dst, $src}",
50 [(set GR32:$dst, (sextloadi32i8 addr:$src))]>, TB;
51 def MOVSX32rr16: I<0xBF, MRMSrcReg, (outs GR32:$dst), (ins GR16:$src),
52 "movs{wl|x}\t{$src, $dst|$dst, $src}",
53 [(set GR32:$dst, (sext GR16:$src))]>, TB;
54 def MOVSX32rm16: I<0xBF, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src),
55 "movs{wl|x}\t{$src, $dst|$dst, $src}",
56 [(set GR32:$dst, (sextloadi32i16 addr:$src))]>, TB;
58 def MOVZX16rr8 : I<0xB6, MRMSrcReg, (outs GR16:$dst), (ins GR8:$src),
59 "movz{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
60 def MOVZX16rm8 : I<0xB6, MRMSrcMem, (outs GR16:$dst), (ins i8mem:$src),
61 "movz{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
62 def MOVZX32rr8 : I<0xB6, MRMSrcReg, (outs GR32:$dst), (ins GR8 :$src),
63 "movz{bl|x}\t{$src, $dst|$dst, $src}",
64 [(set GR32:$dst, (zext GR8:$src))]>, TB;
65 def MOVZX32rm8 : I<0xB6, MRMSrcMem, (outs GR32:$dst), (ins i8mem :$src),
66 "movz{bl|x}\t{$src, $dst|$dst, $src}",
67 [(set GR32:$dst, (zextloadi32i8 addr:$src))]>, TB;
68 def MOVZX32rr16: I<0xB7, MRMSrcReg, (outs GR32:$dst), (ins GR16:$src),
69 "movz{wl|x}\t{$src, $dst|$dst, $src}",
70 [(set GR32:$dst, (zext GR16:$src))]>, TB;
71 def MOVZX32rm16: I<0xB7, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src),
72 "movz{wl|x}\t{$src, $dst|$dst, $src}",
73 [(set GR32:$dst, (zextloadi32i16 addr:$src))]>, TB;
79 (outs GR32_NOREX:$dst), (ins GR8:$src),
80 "movz{bl|x}\t{$src, $dst|$dst, $src}",
84 (outs GR32_NOREX:$dst), (ins i8mem:$src),
85 "movz{bl|x}\t{$src, $dst|$dst, $src}",
92 def MOVSX64rr8 : RI<0xBE, MRMSrcReg, (outs GR64:$dst), (ins GR8 :$src),
93 "movs{bq|x}\t{$src, $dst|$dst, $src}",
94 [(set GR64:$dst, (sext GR8:$src))]>, TB;
95 def MOVSX64rm8 : RI<0xBE, MRMSrcMem, (outs GR64:$dst), (ins i8mem :$src),
96 "movs{bq|x}\t{$src, $dst|$dst, $src}",
97 [(set GR64:$dst, (sextloadi64i8 addr:$src))]>, TB;
98 def MOVSX64rr16: RI<0xBF, MRMSrcReg, (outs GR64:$dst), (ins GR16:$src),
99 "movs{wq|x}\t{$src, $dst|$dst, $src}",
100 [(set GR64:$dst, (sext GR16:$src))]>, TB;
101 def MOVSX64rm16: RI<0xBF, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src),
102 "movs{wq|x}\t{$src, $dst|$dst, $src}",
103 [(set GR64:$dst, (sextloadi64i16 addr:$src))]>, TB;
104 def MOVSX64rr32: RI<0x63, MRMSrcReg, (outs GR64:$dst), (ins GR32:$src),
105 "movs{lq|xd}\t{$src, $dst|$dst, $src}",
106 [(set GR64:$dst, (sext GR32:$src))]>;
107 def MOVSX64rm32: RI<0x63, MRMSrcMem, (outs GR64:$dst), (ins i32mem:$src),
108 "movs{lq|xd}\t{$src, $dst|$dst, $src}",
109 [(set GR64:$dst, (sextloadi64i32 addr:$src))]>;
112 def MOVZX64rr8_Q : RI<0xB6, MRMSrcReg, (outs GR64:$dst), (ins GR8:$src),
113 "movz{bq|x}\t{$src, $dst|$dst, $src}", []>, TB;
114 def MOVZX64rm8_Q : RI<0xB6, MRMSrcMem, (outs GR64:$dst), (ins i8mem:$src),
115 "movz{bq|x}\t{$src, $dst|$dst, $src}", []>, TB;
116 def MOVZX64rr16_Q : RI<0xB7, MRMSrcReg, (outs GR64:$dst), (ins GR16:$src),
117 "movz{wq|x}\t{$src, $dst|$dst, $src}", []>, TB;
118 def MOVZX64rm16_Q : RI<0xB7, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src),
119 "movz{wq|x}\t{$src, $dst|$dst, $src}", []>, TB;
126 def MOVZX64rr8 : I<0xB6, MRMSrcReg, (outs GR64:$dst), (ins GR8 :$src),
127 "", [(set GR64:$dst, (zext GR8:$src))]>, TB;
128 def MOVZX64rm8 : I<0xB6, MRMSrcMem, (outs GR64:$dst), (ins i8mem :$src),
129 "", [(set GR64:$dst, (zextloadi64i8 addr:$src))]>, TB;
132 def MOVZX64rr16: I<0xB7, MRMSrcReg, (outs GR64:$dst), (ins GR16:$src),
133 "", [(set GR64:$dst, (zext GR16:$src))]>, TB;
134 def MOVZX64rm16: I<0xB7, MRMSrcMem, (outs GR64:$dst), (ins i16mem:$src),
135 "", [(set GR64:$dst, (zextloadi64i16 addr:$src))]>, TB;
144 def MOVZX64rr32 : I<0x89, MRMDestReg, (outs GR64:$dst), (ins GR32:$src),
145 "", [(set GR64:$dst, (zext GR32:$src))]>;
146 def MOVZX64rm32 : I<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i32mem:$src),
147 "", [(set GR64:$dst, (zextloadi64i32 addr:$src))]>;