Lines Matching refs:OpSize
59 def IRET16 : I<0xcf, RawFrm, (outs), (ins), "iretw", []>, OpSize;
73 "in{w}\t{%dx, %ax|%AX, %DX}", []>, OpSize;
83 "in{w}\t{$port, %ax|%AX, $port}", []>, OpSize;
93 "out{w}\t{%ax, %dx|%DX, %AX}", []>, OpSize;
103 "out{w}\t{%ax, $port|$port, %AX}", []>, OpSize;
109 def IN16 : I<0x6D, RawFrm, (outs), (ins), "ins{w}", []>, OpSize;
154 "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
161 "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
168 "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
175 "mov{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
187 "lar{w}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
189 "lar{w}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
203 "lsl{w}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
205 "lsl{w}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
218 "str{w}\t{$dst}", []>, TB, OpSize;
232 "push{w}\t%cs", []>, Requires<[In32BitMode]>, OpSize;
236 "push{w}\t%ss", []>, Requires<[In32BitMode]>, OpSize;
240 "push{w}\t%ds", []>, Requires<[In32BitMode]>, OpSize;
244 "push{w}\t%es", []>, Requires<[In32BitMode]>, OpSize;
249 "push{w}\t%fs", []>, OpSize, TB;
253 "push{w}\t%gs", []>, OpSize, TB;
264 "pop{w}\t%ss", []>, OpSize, Requires<[In32BitMode]>;
269 "pop{w}\t%ds", []>, OpSize, Requires<[In32BitMode]>;
274 "pop{w}\t%es", []>, OpSize, Requires<[In32BitMode]>;
279 "pop{w}\t%fs", []>, OpSize, TB;
286 "pop{w}\t%gs", []>, OpSize, TB;
294 "lds{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
299 "lss{w}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
306 "les{w}\t{$src, $dst|$dst, $src}", []>, OpSize;
311 "lfs{w}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
318 "lgs{w}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
339 "sgdtw\t$dst", []>, TB, OpSize, Requires<[In32BitMode]>;
343 "sidtw\t$dst", []>, TB, OpSize, Requires<[In32BitMode]>;
347 "sldt{w}\t$dst", []>, TB, OpSize;
361 "lgdtw\t$src", []>, TB, OpSize, Requires<[In32BitMode]>;
365 "lidtw\t$src", []>, TB, OpSize, Requires<[In32BitMode]>;
380 "smsw{w}\t$dst", []>, OpSize, TB;