382         stl_kernel(env->tr.base + (0x28 + 1 * 4), ECX);  in switch_tss()
396         stw_kernel(env->tr.base + (0x12 + 1 * 2), ECX);  in switch_tss()
448     ECX = new_regs[1];  in switch_tss()
1019         ECX = env->eip + next_eip_addend;  in helper_syscall()
1042         ECX = (uint32_t)(env->eip + next_eip_addend);  in helper_syscall()
1083             env->eip = ECX;  in helper_sysret()
1090             env->eip = (uint32_t)ECX;  in helper_sysret()
1106         env->eip = (uint32_t)ECX;  in helper_sysret()
1426     stq_phys(sm_state + 0x7ff0, ECX);  in do_smm_enter()
1457     stl_phys(sm_state + 0x7fd4, ECX);  in do_smm_enter()
1552     ECX = ldq_phys(sm_state + 0x7ff0);  in helper_rsm()
1587     ECX = ldl_phys(sm_state + 0x7fd4);  in helper_rsm()
1890         stq(a0, ((uint64_t)ECX << 32) | (uint32_t)EBX);  in helper_cmpxchg8b()
1915         stq(a0 + 8, ECX);  in helper_cmpxchg16b()
1944     cpu_x86_cpuid(env, (uint32_t)EAX, (uint32_t)ECX, &eax, &ebx, &ecx, &edx);  in helper_cpuid()
1947     ECX = ecx;  in helper_cpuid()
2884     ESP = ECX;  in helper_sysexit()
3034     switch((uint32_t)ECX) {  in helper_wrmsr()
3104         env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysBase(0)) / 2].base = val;  in helper_wrmsr()
3114         env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysMask(0)) / 2].mask = val;  in helper_wrmsr()
3117         env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix64K_00000] = val;  in helper_wrmsr()
3121         env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix16K_80000 + 1] = val;  in helper_wrmsr()
3131         env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix4K_C0000 + 3] = val;  in helper_wrmsr()
3145         if ((uint32_t)ECX >= MSR_MC0_CTL  in helper_wrmsr()
3146             && (uint32_t)ECX < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) {  in helper_wrmsr()
3147             uint32_t offset = (uint32_t)ECX - MSR_MC0_CTL;  in helper_wrmsr()
3164     switch((uint32_t)ECX) {  in helper_rdmsr()
3232         val = env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysBase(0)) / 2].base;  in helper_rdmsr()
3242         val = env->mtrr_var[((uint32_t)ECX - MSR_MTRRphysMask(0)) / 2].mask;  in helper_rdmsr()
3249         val = env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix16K_80000 + 1];  in helper_rdmsr()
3259         val = env->mtrr_fixed[(uint32_t)ECX - MSR_MTRRfix4K_C0000 + 3];  in helper_rdmsr()
3284         if ((uint32_t)ECX >= MSR_MC0_CTL  in helper_rdmsr()
3285             && (uint32_t)ECX < MSR_MC0_CTL + (4 * env->mcg_cap & 0xff)) {  in helper_rdmsr()
3286             uint32_t offset = (uint32_t)ECX - MSR_MC0_CTL;  in helper_rdmsr()
4697     if ((uint32_t)ECX != 0)  in helper_monitor()
4705     if ((uint32_t)ECX != 0)  in helper_mwait()
5252             switch((uint32_t)ECX) {  in helper_svm_check_intercept_param()
5254                 t0 = (ECX * 2) % 8;  in helper_svm_check_intercept_param()
5255                 t1 = ECX / 8;  in helper_svm_check_intercept_param()
5258                 t0 = (8192 + ECX - 0xc0000000) * 2;  in helper_svm_check_intercept_param()
5263                 t0 = (16384 + ECX - 0xc0010000) * 2;  in helper_svm_check_intercept_param()