/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeTypesGeneric.cpp | 35 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandRes_BITCAST() 146 SDValue &Hi) { in ExpandRes_BUILD_PAIR() 153 SDValue &Hi) { in ExpandRes_EXTRACT_ELEMENT() 165 SDValue &Hi) { in ExpandRes_EXTRACT_VECTOR_ELT() 199 SDValue &Hi) { in ExpandRes_NormalLoad() 239 void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandRes_VAARG() 310 SDValue Lo, Hi; in ExpandOp_BUILD_VECTOR() local 328 SDValue Lo, Hi; in ExpandOp_EXTRACT_ELEMENT() local 352 SDValue Lo, Hi; in ExpandOp_INSERT_VECTOR_ELT() local 399 SDValue Lo, Hi; in ExpandOp_NormalStore() local [all …]
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D | LegalizeFloatTypes.cpp | 815 SDValue Lo, Hi; in ExpandFloatResult() local 877 SDValue &Hi) { in ExpandFloatRes_ConstantFP() 889 SDValue &Hi) { in ExpandFloatRes_FABS() 903 SDValue &Hi) { in ExpandFloatRes_FADD() 912 SDValue &Lo, SDValue &Hi) { in ExpandFloatRes_FCEIL() 921 SDValue &Lo, SDValue &Hi) { in ExpandFloatRes_FCOPYSIGN() 932 SDValue &Lo, SDValue &Hi) { in ExpandFloatRes_FCOS() 941 SDValue &Hi) { in ExpandFloatRes_FDIV() 954 SDValue &Lo, SDValue &Hi) { in ExpandFloatRes_FEXP() 963 SDValue &Lo, SDValue &Hi) { in ExpandFloatRes_FEXP2() [all …]
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D | LegalizeIntegerTypes.cpp | 211 SDValue Lo, Hi; in PromoteIntRes_BITCAST() local 617 SDValue Hi = DAG.getNode(ISD::SRL, DL, Mul.getValueType(), Mul, in PromoteIntRes_XMULO() local 830 SDValue Hi = GetPromotedInteger(N->getOperand(1)); in PromoteIntOp_BUILD_PAIR() local 1012 SDValue Lo, Hi; in ExpandIntegerResult() local 1196 SDValue &Lo, SDValue &Hi) { in ExpandShiftByConstant() 1287 ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandShiftWithKnownAmountBit() 1365 ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandShiftWithUnknownAmountBit() 1442 SDValue &Lo, SDValue &Hi) { in ExpandIntRes_ADDSUB() 1504 SDValue &Lo, SDValue &Hi) { in ExpandIntRes_ADDSUBC() 1530 SDValue &Lo, SDValue &Hi) { in ExpandIntRes_ADDSUBE() [all …]
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D | LegalizeTypes.cpp | 765 SDValue &Hi) { in GetExpandedInteger() 775 SDValue Hi) { in SetExpandedInteger() 792 SDValue &Hi) { in GetExpandedFloat() 802 SDValue Hi) { in SetExpandedFloat() 819 SDValue &Hi) { in GetSplitVector() 829 SDValue Hi) { in SetSplitVector() 966 SDValue &Lo, SDValue &Hi) { in GetPairElements() 993 SDValue DAGTypeLegalizer::JoinIntegers(SDValue Lo, SDValue Hi) { in JoinIntegers() 1121 SDValue &Lo, SDValue &Hi) { in SplitInteger() 1134 SDValue &Lo, SDValue &Hi) { in SplitInteger()
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D | LegalizeTypes.h | 662 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) { in GetSplitOp() 694 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) { in GetExpandedOp()
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D | LegalizeVectorTypes.cpp | 407 SDValue Lo, Hi; in SplitVectorResult() local 503 SDValue &Hi) { in SplitVecRes_BinOp() 515 SDValue &Hi) { in SplitVecRes_BITCAST() 572 SDValue &Hi) { in SplitVecRes_BUILD_VECTOR() 585 SDValue &Hi) { in SplitVecRes_CONCAT_VECTORS() 606 SDValue &Hi) { in SplitVecRes_EXTRACT_SUBVECTOR() 621 SDValue &Hi) { in SplitVecRes_FPOWI() 629 SDValue &Hi) { in SplitVecRes_InregOp() 644 SDValue &Hi) { in SplitVecRes_INSERT_VECTOR_ELT() 694 SDValue &Hi) { in SplitVecRes_SCALAR_TO_VECTOR() [all …]
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D | LegalizeDAG.cpp | 481 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); in ExpandUnalignedStore() local 602 SDValue Lo, Hi; in ExpandUnalignedLoad() local 751 SDValue Hi = DAG.getConstant(IntVal.lshr(32).trunc(32), MVT::i32); in OptimizeFloatStore() local 1225 SDValue Lo, Hi, Ch; in LegalizeOp() local 1542 SDValue Lo, Hi; in LegalizeOp() local 2423 SDValue Hi = StackSlot; in ExpandLegalINT_TO_FP() local 2489 SDValue Hi = DAG.getNode(ISD::SRL, dl, MVT::i64, Op0, in ExpandLegalINT_TO_FP() local
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/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.h | 32 Hi, Lo, // Hi/Lo operations, typically on a global address. enumerator
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D | SparcISelLowering.cpp | 469 SDValue Hi = DAG.getLoad(MVT::i32, dl, Store, StackPtr, in LowerCall() local 886 SDValue Hi = DAG.getNode(SPISD::Hi, dl, MVT::i32, GA); in LowerGlobalAddress() local 908 SDValue Hi = DAG.getNode(SPISD::Hi, dl, MVT::i32, CP); in LowerConstantPool() local
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/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.h | 34 Hi, enumerator
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D | MipsISelDAGToDAG.cpp | 379 SDNode *Hi = CurDAG->getMachineNode(Mips::MFHI, dl, MVT::i32, InFlag); in Select() local
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D | MipsISelLowering.cpp | 1294 SDValue Hi = DAG.getNode(MipsISD::Hi, dl, MVT::i32, BAHi); in LowerBlockAddress() local 1361 SDValue Hi = DAG.getNode(MipsISD::TprelHi, dl, VTs, &TGAHi, 1); in LowerGlobalTLSAddress() local 1796 SDValue Hi = DAG.getNode(MipsISD::ExtractElementF64, dl, MVT::i32, in LowerCall() local
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/external/llvm/lib/Target/CellSPU/ |
D | SPUISelLowering.h | 31 Hi, ///< High address component (upper 16) enumerator
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D | SPUISelLowering.cpp | 62 bool isSigned, SDValue &Hi, const SPUTargetLowering &TLI) { in ExpandLibCall() 1007 SDValue Hi = DAG.getNode(SPUISD::Hi, dl, PtrVT, CPI, Zero); in LowerConstantPool() local 1038 SDValue Hi = DAG.getNode(SPUISD::Hi, dl, PtrVT, JTI, Zero); in LowerJumpTable() local 1065 SDValue Hi = DAG.getNode(SPUISD::Hi, dl, PtrVT, GA, Zero); in LowerGlobalAddress() local
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/external/llvm/lib/Target/Alpha/ |
D | AlphaISelLowering.cpp | 195 SDValue Hi = DAG.getNode(AlphaISD::GPRelHi, dl, MVT::i64, JTI, in LowerJumpTable() local 603 SDValue Hi = DAG.getNode(ISD::SELECT, dl, MVT::i64, BMCC, Hi_Neg, Hi_Pos); in LowerOperation() local 640 SDValue Hi = DAG.getNode(AlphaISD::GPRelHi, dl, MVT::i64, CPI, in LowerOperation() local 657 SDValue Hi = DAG.getNode(AlphaISD::GPRelHi, dl, MVT::i64, GA, in LowerOperation() local
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/external/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.cpp | 557 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl, in LowerSMUL_LOHI() local 574 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl, in LowerUMUL_LOHI() local 671 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl, in TryExpandADDWithMul() local 679 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl, in TryExpandADDWithMul() local 690 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl, in TryExpandADDWithMul() local 736 SDValue Hi(Ignored.getNode(), 1); in ExpandADDSUB() local 1460 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl, in PerformDAGCombine() local
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.h | 60 Hi, Lo, enumerator
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/external/webkit/Tools/Scripts/webkitpy/tool/bot/ |
D | irc_command.py | 106 class Hi(IRCCommand): class
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/external/llvm/lib/MC/ |
D | SubtargetFeature.cpp | 127 const T *Hi = A + L; in Find() local
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/external/llvm/include/llvm/Support/ |
D | MathExtras.h | 205 uint32_t Hi = Hi_32(Value); in CountLeadingZeros_64() local
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/external/llvm/lib/CodeGen/AsmPrinter/ |
D | DIE.h | 341 DIEDelta(const MCSymbol *Hi, const MCSymbol *Lo) in DIEDelta()
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D | AsmPrinter.cpp | 1292 void AsmPrinter::EmitLabelDifference(const MCSymbol *Hi, const MCSymbol *Lo, in EmitLabelDifference() 1314 void AsmPrinter::EmitLabelOffsetDifference(const MCSymbol *Hi, uint64_t Offset, in EmitLabelOffsetDifference()
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/external/skia/src/core/ |
D | SkMath.cpp | 190 uint32_t Hi = A + (B >>16) + (Lo < C); in SkFractMul_portable() local
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/external/clang/lib/Sema/ |
D | SemaStmt.cpp | 653 Expr *Hi = CR->getRHS(); in ActOnFinishSwitchStmt() local 794 llvm::APSInt Hi = RI->second->getRHS()->EvaluateAsInt(Context); in ActOnFinishSwitchStmt() local 822 llvm::APSInt Hi = RI->second->getRHS()->EvaluateAsInt(Context); in ActOnFinishSwitchStmt() local
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/external/clang/lib/CodeGen/ |
D | TargetInfo.cpp | 1621 GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, in GetX86_64ByValArgumentPair() 1661 X86_64ABIInfo::Class Lo, Hi; in classifyReturnType() local 1788 X86_64ABIInfo::Class Lo, Hi; in classifyArgumentType() local
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