| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ThumbDisassemblerCore.h | 350 static bool DisassembleThumb1General(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleThumb1General()
425 static bool DisassembleThumb1DP(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleThumb1DP()
484 static bool DisassembleThumb1Special(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleThumb1Special()
554 static bool DisassembleThumb1LdPC(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleThumb1LdPC()
602 static bool DisassembleThumb2Ldpci(MCInst &MI, unsigned Opcode, in DisassembleThumb2Ldpci()
630 static bool DisassembleThumb1LdSt(unsigned opA, MCInst &MI, unsigned Opcode, in DisassembleThumb1LdSt()
677 static bool DisassembleThumb1LdStSP(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleThumb1LdStSP()
706 static bool DisassembleThumb1AddPCi(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleThumb1AddPCi()
731 static bool DisassembleThumb1AddSPi(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleThumb1AddSPi()
762 static bool DisassembleThumb1PushPop(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleThumb1PushPop()
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| D | ARMDisassemblerCore.cpp | 80 const char *ARMUtils::OpcodeName(unsigned Opcode) { in OpcodeName()
514 static bool DisassemblePseudo(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassemblePseudo()
530 static bool BadRegsMulFrm(unsigned Opcode, uint32_t insn) { in BadRegsMulFrm()
590 static bool DisassembleMulFrm(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleMulFrm()
644 static bool LdStCopOpcode(unsigned Opcode) { in LdStCopOpcode()
650 static bool CoprocessorOpcode(unsigned Opcode) { in CoprocessorOpcode()
695 static bool DisassembleCoprocessor(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleCoprocessor()
801 static bool DisassembleBrFrm(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleBrFrm()
903 static bool DisassembleBrMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn, in DisassembleBrMiscFrm()
959 static bool BadRegsDPFrm(unsigned Opcode, uint32_t insn) { in BadRegsDPFrm()
[all …]
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| D | ARMDisassembler.cpp | 255 static unsigned T2Morph2LoadLiteral(unsigned Opcode) { in T2Morph2LoadLiteral()
290 static unsigned T2Morph2PLDLiteral(unsigned Opcode) { in T2Morph2PLDLiteral()
410 unsigned Opcode = decodeARMInstruction(insn); in getInstruction() local
493 unsigned Opcode = decodeThumbSideEffect(IsThumb2, insn); in getInstruction() local
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| /external/webkit/Source/WebCore/xml/ |
| D | XPathPredicate.h | 67 enum Opcode { enum
80 enum Opcode { OP_EQ, OP_NE, OP_GT, OP_LT, OP_GE, OP_LE }; enum
92 enum Opcode { OP_And, OP_Or }; enum
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| /external/webkit/Source/JavaScriptCore/bytecode/ |
| D | Opcode.h | 220 typedef void* Opcode; typedef
222 typedef const void* Opcode; typedef
225 typedef OpcodeID Opcode; typedef
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCPredicates.cpp | 19 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { in InvertPredicate()
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| D | PPCHazardRecognizers.cpp | 66 PPCHazardRecognizer970::GetInstrType(unsigned Opcode, in GetInstrType()
134 unsigned Opcode = Node->getMachineOpcode(); in getHazardType() local
233 unsigned Opcode = Node->getMachineOpcode(); in EmitInstruction() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMHazardRecognizer.cpp | 26 unsigned Opcode = MCID.getOpcode(); in hasRAWHazard() local
85 unsigned Opcode = MI->getOpcode(); in EmitInstruction() local
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| D | ARMLoadStoreOptimizer.cpp | 131 static int getLoadStoreMultipleOpcode(int Opcode, ARM_AM::AMSubMode Mode) { in getLoadStoreMultipleOpcode()
212 AMSubMode getLoadStoreMultipleSubMode(int Opcode) { in getLoadStoreMultipleSubMode()
291 int Opcode, ARMCC::CondCodes Pred, in MergeOps()
371 int Opcode, in MergeOpsUpdate()
438 unsigned Base, int Opcode, unsigned Size, in MergeLDR_STR()
689 int Opcode = MI->getOpcode(); in MergeBaseUpdateLSMultiple() local
825 int Opcode = MI->getOpcode(); in MergeBaseUpdateLoadStore() local
973 int Opcode = MI->getOpcode(); in isMemoryOp() local
1010 int Opcode = MI->getOpcode(); in getMemoryOpOffset() local
1060 unsigned Opcode = MI->getOpcode(); in FixInvalidRegPairOp() local
[all …]
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| D | ARMBaseInstrInfo.h | 399 bool isFpMLxInstruction(unsigned Opcode) const { in isFpMLxInstruction()
413 bool canCauseFpMLxStall(unsigned Opcode) const { in canCauseFpMLxStall()
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| D | Thumb1RegisterInfo.cpp | 376 static unsigned convertToNonSPOpcode(unsigned Opcode) { in convertToNonSPOpcode()
395 unsigned Opcode = MI.getOpcode(); in rewriteFrameIndex() local
652 unsigned Opcode = MI.getOpcode(); in eliminateFrameIndex() local
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrInfo.h | 43 const MCInstrDesc &get(unsigned Opcode) const { in get()
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| /external/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 231 static void SimplifyShortImmForm(MCInst &Inst, unsigned Opcode) { in SimplifyShortImmForm()
252 unsigned Opcode) { in SimplifyShortMoveForm()
402 unsigned Opcode = OutMI.getOpcode(); in Lower() local
421 unsigned Opcode; in Lower() local
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelDAGToDAG.cpp | 165 unsigned Opcode = N->getOpcode() == ISD::SDIV ? SP::SDIVrr : SP::UDIVrr; in Select() local
174 unsigned Opcode = N->getOpcode() == ISD::MULHU ? SP::UMULrr : SP::SMULrr; in Select() local
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreFrameLowering.cpp | 54 int Opcode = isU6 ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; in loadFromStack() local
69 int Opcode = isU6 ? XCore::STWSP_ru6 : XCore::STWSP_lru6; in storeToStack() local
126 int Opcode; in emitPrologue() local
263 int Opcode = (isU6) ? XCore::RETSP_u6 : XCore::RETSP_lu6; in emitEpilogue() local
267 int Opcode = (isU6) ? XCore::LDAWSP_ru6_RRegs : XCore::LDAWSP_lru6_RRegs; in emitEpilogue() local
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| D | XCoreRegisterInfo.cpp | 147 int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in eliminateCallFramePseudoInstr() local
152 int Opcode = isU6 ? XCore::LDAWSP_ru6_RRegs : XCore::LDAWSP_lru6_RRegs; in eliminateCallFramePseudoInstr() local
319 int Opcode = isImmU6(Value) ? XCore::LDC_ru6 : XCore::LDC_lru6; in loadConstant() local
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| D | XCoreInstrInfo.cpp | 58 int Opcode = MI->getOpcode(); in isLoadFromStackSlot() local
80 int Opcode = MI->getOpcode(); in isStoreToStackSlot() local
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 367 unsigned Opcode = Addr.getOpcode(); in SelectAddrRI12() local
416 unsigned Opcode = Addr.getOpcode(); in SelectAddrRI() local
459 unsigned Opcode = Addr.getOpcode(); in SelectAddrRRI12() local
508 unsigned Opcode = Addr.getOpcode(); in SelectAddrRRI20() local
590 unsigned Opcode = Node->getOpcode(); in Select() local
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| /external/llvm/lib/VMCore/ |
| D | ConstantsContext.h | 39 UnaryConstantExpr(unsigned Opcode, Constant *C, Type *Ty) in UnaryConstantExpr()
55 BinaryConstantExpr(unsigned Opcode, Constant *C1, Constant *C2, in BinaryConstantExpr()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 242 static int isSignedOp(ISD::CondCode Opcode) { in isSignedOp()
1426 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; in getShiftAmountOperand() local
2352 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) { in getNode()
2369 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, in getNode()
2616 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, in FoldConstantArithmetic()
2652 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, in getNode()
3084 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, in getNode()
3176 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, in getNode()
3183 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, in getNode()
3815 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT, in getAtomic()
[all …]
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| /external/llvm/utils/TableGen/ |
| D | X86RecognizableInstr.h | 46 uint8_t Opcode; variable
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| /external/llvm/lib/Target/Alpha/ |
| D | AlphaInstrInfo.cpp | 72 static bool isAlphaIntCondCode(unsigned Opcode) { in isAlphaIntCondCode()
196 static unsigned AlphaRevCondCode(unsigned Opcode) { in AlphaRevCondCode()
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| /external/llvm/lib/Transforms/Scalar/ |
| D | Reassociate.cpp | 203 static BinaryOperator *isReassociableOp(Value *V, unsigned Opcode) { in isReassociableOp()
275 unsigned Opcode = I->getOpcode(); in LinearizeExprTree() local
662 static Value *OptimizeAndOrXor(unsigned Opcode, in OptimizeAndOrXor()
898 unsigned Opcode = I->getOpcode(); in OptimizeExpression() local
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| /external/llvm/lib/Analysis/ |
| D | InstructionSimplify.cpp | 76 static Value *ExpandBinOp(unsigned Opcode, Value *LHS, Value *RHS, in ExpandBinOp()
139 static Value *FactorizeBinOp(unsigned Opcode, Value *LHS, Value *RHS, in FactorizeBinOp()
213 Instruction::BinaryOps Opcode = (Instruction::BinaryOps)Opc; in SimplifyAssociativeBinOp() local
310 static Value *ThreadBinOpOverSelect(unsigned Opcode, Value *LHS, Value *RHS, in ThreadBinOpOverSelect()
440 static Value *ThreadBinOpOverPHI(unsigned Opcode, Value *LHS, Value *RHS, in ThreadBinOpOverPHI()
785 static Value *SimplifyDiv(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, in SimplifyDiv()
906 static Value *SimplifyRem(Instruction::BinaryOps Opcode, Value *Op0, Value *Op1, in SimplifyRem()
1009 static Value *SimplifyShift(unsigned Opcode, Value *Op0, Value *Op1, in SimplifyShift()
2301 static Value *SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS, in SimplifyBinOp()
2358 Value *llvm::SimplifyBinOp(unsigned Opcode, Value *LHS, Value *RHS, in SimplifyBinOp()
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| /external/llvm/include/llvm/ |
| D | Instruction.h | 96 static inline bool isBinaryOp(unsigned Opcode) { in isBinaryOp()
101 static inline bool isShift(unsigned Opcode) { in isShift()
|