Home
last modified time | relevance | path

Searched defs:VReg (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/CodeGen/
DLiveIntervalUnion.h174 Query(LiveInterval *VReg, LiveIntervalUnion *LIU): in Query()
190 void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) { in init()
DLiveRangeEdit.cpp36 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in createFrom() local
DMachineFunction.cpp393 unsigned VReg = MRI.getLiveInVirtReg(PReg); in addLiveIn() local
DTailDuplication.cpp220 unsigned VReg = SSAUpdateVRs[i]; in TailDuplicateAndUpdate() local
DLiveIntervalAnalysis.cpp1891 unsigned VReg = spills[i].vreg; in addIntervalsForSpills() local
1956 unsigned VReg = restores[i].vreg; in addIntervalsForSpills() local
DTwoAddressInstructionPass.cpp1264 unsigned VReg = TargetRegisterInfo::index2VirtReg(i); in runOnMachineFunction() local
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp244 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo()); in getVR() local
275 unsigned VReg = getVR(Op, VRBaseMap); in AddRegisterOperand() local
435 unsigned VReg = getVR(Node->getOperand(0), VRBaseMap); in EmitSubregNode() local
531 unsigned VReg = getVR(Node->getOperand(0), VRBaseMap); in EmitCopyToRegClassNode() local
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp1789 unsigned VReg = MF.getRegInfo().getLiveInVirtReg(GPArgRegs[GPRIndex]); in LowerFormalArguments_SVR4() local
1808 unsigned VReg = MF.getRegInfo().getLiveInVirtReg(FPArgRegs[FPRIndex]); in LowerFormalArguments_SVR4() local
1974 unsigned VReg; in LowerFormalArguments_Darwin() local
1997 unsigned VReg; in LowerFormalArguments_Darwin() local
2024 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); in LowerFormalArguments_Darwin() local
2038 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); in LowerFormalArguments_Darwin() local
2073 unsigned VReg; in LowerFormalArguments_Darwin() local
2096 unsigned VReg = MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass); in LowerFormalArguments_Darwin() local
2171 unsigned VReg; in LowerFormalArguments_Darwin() local
/external/llvm/lib/Target/CellSPU/
DSPUISelLowering.cpp622 unsigned VReg = RegInfo.createVirtualRegister(&SPU::R32CRegClass); in LowerLOAD() local
816 unsigned VReg = RegInfo.createVirtualRegister(&SPU::R32CRegClass); in LowerSTORE() local
1172 unsigned VReg = RegInfo.createVirtualRegister(ArgRegClass); in LowerFormalArguments() local
1220 unsigned VReg = MF.addLiveIn(ArgRegs[ArgRegIdx], &SPU::VECREGRegClass); in LowerFormalArguments() local
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp212 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); in LowerFormalArguments() local
324 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); in LowerFormalArguments() local
/external/llvm/lib/Target/ARM/
DThumb1RegisterInfo.cpp600 unsigned VReg = 0; in eliminateFrameIndex() local
DARMISelLowering.cpp2420 unsigned VReg = MF.addLiveIn(GPRArgRegs[firstRegToSaveIndex], RC); in VarArgStyleRegisters() local
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp329 unsigned VReg = RegInfo.createVirtualRegister(RC); in LowerCCCArguments() local
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp1109 unsigned VReg = RegInfo.createVirtualRegister( in LowerCCCArguments() local
1160 unsigned VReg = RegInfo.createVirtualRegister( in LowerCCCArguments() local
/external/llvm/lib/Target/Alpha/
DAlphaISelLowering.cpp42 unsigned VReg = MF.getRegInfo().createVirtualRegister(RC); in AddLiveIn() local
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp336 unsigned VReg = in LowerCCCArguments() local
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp547 unsigned VReg = MF.getRegInfo().createVirtualRegister(RC); in AddLiveIn() local
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp1858 unsigned VReg = MF.addLiveIn(GPR64ArgRegs[NumIntRegs], in LowerFormalArguments() local
1885 unsigned VReg = MF.addLiveIn(XMMArgRegs64Bit[NumXMMRegs], in LowerFormalArguments() local