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1 //=====-- MipsSubtarget.h - Define Subtarget for the Mips -----*- C++ -*--====//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the Mips specific subclass of TargetSubtargetInfo.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef MIPSSUBTARGET_H
15 #define MIPSSUBTARGET_H
16 
17 #include "llvm/Target/TargetSubtargetInfo.h"
18 #include "llvm/MC/MCInstrItineraries.h"
19 #include <string>
20 
21 #define GET_SUBTARGETINFO_HEADER
22 #include "MipsGenSubtargetInfo.inc"
23 
24 namespace llvm {
25 class StringRef;
26 
27 class MipsSubtarget : public MipsGenSubtargetInfo {
28 
29 public:
30   enum MipsABIEnum {
31     O32, O64, N32, N64, EABI
32   };
33 
34 protected:
35 
36   enum MipsArchEnum {
37     Mips1, Mips2, Mips3, Mips4, Mips32, Mips32r2
38   };
39 
40   // Mips architecture version
41   MipsArchEnum MipsArchVersion;
42 
43   // Mips supported ABIs
44   MipsABIEnum MipsABI;
45 
46   // IsLittle - The target is Little Endian
47   bool IsLittle;
48 
49   // IsSingleFloat - The target only supports single precision float
50   // point operations. This enable the target to use all 32 32-bit
51   // floating point registers instead of only using even ones.
52   bool IsSingleFloat;
53 
54   // IsFP64bit - The target processor has 64-bit floating point registers.
55   bool IsFP64bit;
56 
57   // IsFP64bit - General-purpose registers are 64 bits wide
58   bool IsGP64bit;
59 
60   // HasVFPU - Processor has a vector floating point unit.
61   bool HasVFPU;
62 
63   // isLinux - Target system is Linux. Is false we consider ELFOS for now.
64   bool IsLinux;
65 
66   /// Features related to the presence of specific instructions.
67 
68   // HasSEInReg - SEB and SEH (signext in register) instructions.
69   bool HasSEInReg;
70 
71   // HasCondMov - Conditional mov (MOVZ, MOVN) instructions.
72   bool HasCondMov;
73 
74   // HasMulDivAdd - Multiply add and sub (MADD, MADDu, MSUB, MSUBu)
75   // instructions.
76   bool HasMulDivAdd;
77 
78   // HasMinMax - MIN and MAX instructions.
79   bool HasMinMax;
80 
81   // HasSwap - Byte and half swap instructions.
82   bool HasSwap;
83 
84   // HasBitCount - Count leading '1' and '0' bits.
85   bool HasBitCount;
86 
87   InstrItineraryData InstrItins;
88 
89 public:
90 
91   /// Only O32 and EABI supported right now.
isABI_EABI()92   bool isABI_EABI() const { return MipsABI == EABI; }
isABI_O32()93   bool isABI_O32() const { return MipsABI == O32; }
getTargetABI()94   unsigned getTargetABI() const { return MipsABI; }
95 
96   /// This constructor initializes the data members to match that
97   /// of the specified triple.
98   MipsSubtarget(const std::string &TT, const std::string &CPU,
99                 const std::string &FS, bool little);
100 
101   /// ParseSubtargetFeatures - Parses features string setting specified
102   /// subtarget options.  Definition of function is auto generated by tblgen.
103   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
104 
isMips1()105   bool isMips1() const { return MipsArchVersion == Mips1; }
isMips32()106   bool isMips32() const { return MipsArchVersion >= Mips32; }
isMips32r2()107   bool isMips32r2() const { return MipsArchVersion == Mips32r2; }
108 
isLittle()109   bool isLittle() const { return IsLittle; }
isFP64bit()110   bool isFP64bit() const { return IsFP64bit; }
isGP64bit()111   bool isGP64bit() const { return IsGP64bit; }
isGP32bit()112   bool isGP32bit() const { return !IsGP64bit; }
isSingleFloat()113   bool isSingleFloat() const { return IsSingleFloat; }
isNotSingleFloat()114   bool isNotSingleFloat() const { return !IsSingleFloat; }
hasVFPU()115   bool hasVFPU() const { return HasVFPU; }
isLinux()116   bool isLinux() const { return IsLinux; }
117 
118   /// Features related to the presence of specific instructions.
hasSEInReg()119   bool hasSEInReg()   const { return HasSEInReg; }
hasCondMov()120   bool hasCondMov()   const { return HasCondMov; }
hasMulDivAdd()121   bool hasMulDivAdd() const { return HasMulDivAdd; }
hasMinMax()122   bool hasMinMax()    const { return HasMinMax; }
hasSwap()123   bool hasSwap()      const { return HasSwap; }
hasBitCount()124   bool hasBitCount()  const { return HasBitCount; }
125 };
126 } // End llvm namespace
127 
128 #endif
129