1 //===-- X86MCTargetDesc.h - X86 Target Descriptions -------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides X86 specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef X86MCTARGETDESC_H 15 #define X86MCTARGETDESC_H 16 17 #include <string> 18 19 namespace llvm { 20 class MCRegisterInfo; 21 class MCSubtargetInfo; 22 class Target; 23 class StringRef; 24 25 extern Target TheX86_32Target, TheX86_64Target; 26 27 /// DWARFFlavour - Flavour of dwarf regnumbers 28 /// 29 namespace DWARFFlavour { 30 enum { 31 X86_64 = 0, X86_32_DarwinEH = 1, X86_32_Generic = 2 32 }; 33 } 34 35 /// N86 namespace - Native X86 register numbers 36 /// 37 namespace N86 { 38 enum { 39 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7 40 }; 41 } 42 43 namespace X86_MC { 44 std::string ParseX86Triple(StringRef TT); 45 46 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in 47 /// the specified arguments. If we can't run cpuid on the host, return true. 48 bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, 49 unsigned *rEBX, unsigned *rECX, unsigned *rEDX); 50 51 void DetectFamilyModel(unsigned EAX, unsigned &Family, unsigned &Model); 52 53 unsigned getDwarfRegFlavour(StringRef TT, bool isEH); 54 55 unsigned getX86RegNum(unsigned RegNo); 56 57 void InitLLVM2SEHRegisterMapping(MCRegisterInfo *MRI); 58 59 /// createX86MCSubtargetInfo - Create a X86 MCSubtargetInfo instance. 60 /// This is exposed so Asm parser, etc. do not need to go through 61 /// TargetRegistry. 62 MCSubtargetInfo *createX86MCSubtargetInfo(StringRef TT, StringRef CPU, 63 StringRef FS); 64 } 65 66 } // End llvm namespace 67 68 69 // Defines symbolic names for X86 registers. This defines a mapping from 70 // register name to register number. 71 // 72 #define GET_REGINFO_ENUM 73 #include "X86GenRegisterInfo.inc" 74 75 // Defines symbolic names for the X86 instructions. 76 // 77 #define GET_INSTRINFO_ENUM 78 #include "X86GenInstrInfo.inc" 79 80 #define GET_SUBTARGETINFO_ENUM 81 #include "X86GenSubtargetInfo.inc" 82 83 #endif 84