1 //===-- PTXTargetMachine.cpp - Define TargetMachine for PTX ---------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Top-level implementation for the PTX target.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "PTX.h"
15 #include "PTXTargetMachine.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/Target/TargetRegistry.h"
18 #include "llvm/Support/raw_ostream.h"
19
20 using namespace llvm;
21
22 namespace llvm {
23 MCStreamer *createPTXAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
24 bool isVerboseAsm, bool useLoc,
25 bool useCFI,
26 MCInstPrinter *InstPrint,
27 MCCodeEmitter *CE,
28 TargetAsmBackend *TAB,
29 bool ShowInst);
30 }
31
LLVMInitializePTXTarget()32 extern "C" void LLVMInitializePTXTarget() {
33
34 RegisterTargetMachine<PTX32TargetMachine> X(ThePTX32Target);
35 RegisterTargetMachine<PTX64TargetMachine> Y(ThePTX64Target);
36
37 TargetRegistry::RegisterAsmStreamer(ThePTX32Target, createPTXAsmStreamer);
38 TargetRegistry::RegisterAsmStreamer(ThePTX64Target, createPTXAsmStreamer);
39 }
40
41 namespace {
42 const char* DataLayout32 =
43 "e-p:32:32-i64:32:32-f64:32:32-v128:32:128-v64:32:64-n32:64";
44 const char* DataLayout64 =
45 "e-p:64:64-i64:32:32-f64:32:32-v128:32:128-v64:32:64-n32:64";
46 }
47
48 // DataLayout and FrameLowering are filled with dummy data
PTXTargetMachine(const Target & T,StringRef TT,StringRef CPU,StringRef FS,Reloc::Model RM,bool is64Bit)49 PTXTargetMachine::PTXTargetMachine(const Target &T,
50 StringRef TT,
51 StringRef CPU,
52 StringRef FS,
53 Reloc::Model RM, bool is64Bit)
54 : LLVMTargetMachine(T, TT, CPU, FS, RM),
55 DataLayout(is64Bit ? DataLayout64 : DataLayout32),
56 Subtarget(TT, CPU, FS, is64Bit),
57 FrameLowering(Subtarget),
58 InstrInfo(*this),
59 TLInfo(*this) {
60 }
61
PTX32TargetMachine(const Target & T,StringRef TT,StringRef CPU,StringRef FS,Reloc::Model RM)62 PTX32TargetMachine::PTX32TargetMachine(const Target &T, StringRef TT,
63 StringRef CPU, StringRef FS,
64 Reloc::Model RM)
65 : PTXTargetMachine(T, TT, CPU, FS, RM, false) {
66 }
67
PTX64TargetMachine(const Target & T,StringRef TT,StringRef CPU,StringRef FS,Reloc::Model RM)68 PTX64TargetMachine::PTX64TargetMachine(const Target &T, StringRef TT,
69 StringRef CPU, StringRef FS,
70 Reloc::Model RM)
71 : PTXTargetMachine(T, TT, CPU, FS, RM, true) {
72 }
73
addInstSelector(PassManagerBase & PM,CodeGenOpt::Level OptLevel)74 bool PTXTargetMachine::addInstSelector(PassManagerBase &PM,
75 CodeGenOpt::Level OptLevel) {
76 PM.add(createPTXISelDag(*this, OptLevel));
77 return false;
78 }
79
addPostRegAlloc(PassManagerBase & PM,CodeGenOpt::Level OptLevel)80 bool PTXTargetMachine::addPostRegAlloc(PassManagerBase &PM,
81 CodeGenOpt::Level OptLevel) {
82 // PTXMFInfoExtract must after register allocation!
83 PM.add(createPTXMFInfoExtract(*this, OptLevel));
84 return false;
85 }
86