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Searched refs:lir (Results 1 – 10 of 10) sorted by relevance

/dalvik/vm/compiler/codegen/arm/
DCodegenCommon.cpp35 static void setMemRefType(ArmLIR *lir, bool isLoad, int memType) in setMemRefType() argument
39 assert(EncodingMap[lir->opcode].flags & (IS_LOAD | IS_STORE)); in setMemRefType()
41 maskPtr = &lir->useMask; in setMemRefType()
43 maskPtr = &lir->defMask; in setMemRefType()
61 assert(!(EncodingMap[lir->opcode].flags & IS_STORE)); in setMemRefType()
75 static void annotateDalvikRegAccess(ArmLIR *lir, int regId, bool isLoad) in annotateDalvikRegAccess() argument
77 setMemRefType(lir, isLoad, kDalvikReg); in annotateDalvikRegAccess()
83 lir->aliasInfo = regId; in annotateDalvikRegAccess()
84 if (DOUBLEREG(lir->operands[0])) { in annotateDalvikRegAccess()
85 lir->aliasInfo |= 0x80000000; in annotateDalvikRegAccess()
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DArchUtility.cpp76 static void buildInsnString(const char *fmt, ArmLIR *lir, char* buf, in buildInsnString() argument
96 operand = lir->operands[nc-'0']; in buildInsnString()
199 (int) baseAddr + lir->generic.offset + 4 + in buildInsnString()
201 lir->generic.target); in buildInsnString()
204 int offset_1 = lir->operands[0]; in buildInsnString()
205 int offset_2 = NEXT_LIR(lir)->operands[0]; in buildInsnString()
207 ((((intptr_t) baseAddr + lir->generic.offset + 4) & in buildInsnString()
219 decodeRegList(lir->opcode, operand, tbuf); in buildInsnString()
241 void dvmDumpResourceMask(LIR *lir, u8 mask, const char *prefix) in dvmDumpResourceMask() argument
245 ArmLIR *armLIR = (ArmLIR *) lir; in dvmDumpResourceMask()
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DAssemble.cpp936 ArmLIR *lir; in assembleInstructions() local
938 for (lir = (ArmLIR *) cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) { in assembleInstructions()
939 if (lir->opcode < 0) { in assembleInstructions()
940 if ((lir->opcode == kArmPseudoPseudoAlign4) && in assembleInstructions()
942 (lir->operands[0] == 1)) { in assembleInstructions()
948 if (lir->flags.isNop) { in assembleInstructions()
952 if (lir->opcode == kThumbLdrPcRel || in assembleInstructions()
953 lir->opcode == kThumb2LdrPcRel12 || in assembleInstructions()
954 lir->opcode == kThumbAddPcRel || in assembleInstructions()
955 ((lir->opcode == kThumb2Vldrs) && (lir->operands[1] == r15pc))) { in assembleInstructions()
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DArmLIR.h784 #define NEXT_LIR(lir) ((ArmLIR *) lir->generic.next) argument
785 #define PREV_LIR(lir) ((ArmLIR *) lir->generic.prev) argument
787 #define NEXT_LIR_LVALUE(lir) (lir)->generic.next argument
788 #define PREV_LIR_LVALUE(lir) (lir)->generic.prev argument
DCodegen.h62 extern void dvmCompilerSetupResourceMasks(ArmLIR *lir);
DCodegenDriver.cpp4793 void dvmCompilerSetupResourceMasks(ArmLIR *lir) in dvmCompilerSetupResourceMasks() argument
4795 setupResourceMasks(lir); in dvmCompilerSetupResourceMasks()
/dalvik/vm/compiler/codegen/x86/
DX86LIR.h171 #define NEXT_LIR(lir) ((X86LIR *) lir->generic.next) argument
172 #define PREV_LIR(lir) ((X86LIR *) lir->generic.prev) argument
174 #define NEXT_LIR_LVALUE(lir) (lir)->generic.next argument
175 #define PREV_LIR_LVALUE(lir) (lir)->generic.prev argument
/dalvik/vm/compiler/
DIntermediateRep.cpp81 void dvmCompilerAppendLIR(CompilationUnit *cUnit, LIR *lir) in dvmCompilerAppendLIR() argument
85 cUnit->lastLIRInsn = cUnit->firstLIRInsn = lir; in dvmCompilerAppendLIR()
86 lir->prev = lir->next = NULL; in dvmCompilerAppendLIR()
88 cUnit->lastLIRInsn->next = lir; in dvmCompilerAppendLIR()
89 lir->prev = cUnit->lastLIRInsn; in dvmCompilerAppendLIR()
90 lir->next = NULL; in dvmCompilerAppendLIR()
91 cUnit->lastLIRInsn = lir; in dvmCompilerAppendLIR()
DCompilerUtility.h71 void dvmDumpLIRInsn(struct LIR *lir, unsigned char *baseAddr);
72 void dvmDumpResourceMask(struct LIR *lir, u8 mask, const char *prefix);
DCompilerIR.h291 void dvmCompilerAppendLIR(CompilationUnit *cUnit, LIR *lir);