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/dalvik/vm/compiler/template/armv5te/
DTEMPLATE_SAVE_STATE.S15 stmia r0!, {r7} @ save regMap
16 ldr r7, [r13, #0] @ recover r0 value
17 stmia r0!, {r7} @ save r0
18 ldr r7, [r13, #4] @ recover r7 value
20 pop {r0, r7} @ recover r0, r7
DTEMPLATE_INVOKE_METHOD_PREDICTED_CHAIN.S32 ldr r7, .LdvmICHitCount
36 ldr r10, [r7, #0]
39 ldreq r10, [r7, #0]
42 streq r10, [r7, #0]
44 ldreqh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
47 ldr r7, [r3, #offClassObject_vtable] @ r7 <- this->class->vtable
DTEMPLATE_STRING_COMPARETO.S25 ldr r7, [r2, #STRING_FIELDOFF_COUNT]
39 subs r11, r7, r10
40 movls r10, r7
72 ldrh r7, [r2, #2]!
75 subeqs r0, r7, r8
85 ldrh r7, [r2, #2]!
90 subeqs r0, r7, r8
122 mov r7, r11
129 mov r0, r7
DTEMPLATE_STRING_INDEXOF.S18 ldr r7, [r0, #STRING_FIELDOFF_OFFSET]
33 add r0, r0, r7, lsl #1
36 mov r7, r0
96 sub r0, r7
101 sub r0, r7
106 sub r0, r7
110 sub r0, r7
Dheader.S77 #define rINST r7
DTEMPLATE_INVOKE_METHOD_NO_OPT.S7 ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
13 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
DTEMPLATE_INVOKE_METHOD_CHAIN.S8 @ rPC = dalvikCallsite, r7 = methodToCall->registersSize
15 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
DTEMPLATE_INVOKE_METHOD_NATIVE.S2 @ r7 = methodToCall->registersSize
7 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
/dalvik/vm/compiler/template/armv5te-vfp/
DTEMPLATE_SAVE_STATE.S15 stmia r0!, {r7} @ save regMap
16 ldr r7, [r13, #0] @ recover r0 value
17 stmia r0!, {r7} @ save r0
18 ldr r7, [r13, #4] @ recover r7 value
22 pop {r0, r7} @ recover r0, r7
/dalvik/vm/compiler/template/out/
DCompilerTemplateAsm-armv5te.S84 #define rINST r7
379 ldr r10, [r7, #0]
382 ldreq r10, [r7, #0]
385 streq r10, [r7, #0]
387 ldreqh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
390 ldr r7, [r3, #offClassObject_vtable] @ r7 <- this->class->vtable
411 @ r7 = methodToCall->registersSize
416 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
867 ldr r7, [r2, #STRING_FIELDOFF_COUNT]
881 subs r11, r7, r10
[all …]
DCompilerTemplateAsm-armv7-a-neon.S84 #define rINST r7
379 ldr r10, [r7, #0]
382 ldreq r10, [r7, #0]
385 streq r10, [r7, #0]
387 ldreqh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
390 ldr r7, [r3, #offClassObject_vtable] @ r7 <- this->class->vtable
411 @ r7 = methodToCall->registersSize
416 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
1136 ldr r7, [r2, #STRING_FIELDOFF_COUNT]
1150 subs r11, r7, r10
[all …]
DCompilerTemplateAsm-armv5te-vfp.S84 #define rINST r7
379 ldr r10, [r7, #0]
382 ldreq r10, [r7, #0]
385 streq r10, [r7, #0]
387 ldreqh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
390 ldr r7, [r3, #offClassObject_vtable] @ r7 <- this->class->vtable
411 @ r7 = methodToCall->registersSize
416 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
1136 ldr r7, [r2, #STRING_FIELDOFF_COUNT]
1150 subs r11, r7, r10
[all …]
DCompilerTemplateAsm-armv7-a.S84 #define rINST r7
379 ldr r10, [r7, #0]
382 ldreq r10, [r7, #0]
385 streq r10, [r7, #0]
387 ldreqh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
390 ldr r7, [r3, #offClassObject_vtable] @ r7 <- this->class->vtable
411 @ r7 = methodToCall->registersSize
416 sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
1136 ldr r7, [r2, #STRING_FIELDOFF_COUNT]
1150 subs r11, r7, r10
[all …]
/dalvik/vm/arch/arm/
DCallEABI.S152 .save {r6, r7, r8, r9, fp, lr}
153 stmfd sp!, {r6, r7, r8, r9, fp, lr}
203 @ Stick argv in r7 and advance it past the argv values that will be
/dalvik/vm/arch/sh/
DCallSH4ABI.S65 ## r12 ... status of r6, and r7
67 ## bit 1 << 1 : if r7 is available, it contains 1.
127 mov.l @r3+, r7 /* put one arg in r7 */
147 mov.l @r3+, r7
/dalvik/vm/compiler/codegen/arm/
DArmRallocUtil.cpp70 dvmCompilerClobber(cUnit, r7); in dvmCompilerClobberHandlerRegs()
DCodegenDriver.cpp561 int regIndex = r7; /* Preserved across call */ in genArrayObjectPut()
999 opRegRegImm(cUnit, kOpSub, r7, r5FP, in genProcessArgsNoRange()
1006 storeMultiple(cUnit, r7, regMask); in genProcessArgsNoRange()
1043 opRegRegImm(cUnit, kOpSub, r7, r5FP, in genProcessArgsRange()
1068 storeMultiple(cUnit, r7, regMask); in genProcessArgsRange()
1082 if (numArgs != 0) storeMultiple(cUnit, r7, regMask); in genProcessArgsRange()
1098 storeMultiple(cUnit, r7, regMask); in genProcessArgsRange()
1128 loadConstant(cUnit, r7, calleeMethod->registersSize); in genInvokeSingletonCommon()
1248 loadWordDisp(cUnit, r7, methodIndex * 4, r0); in genInvokeVirtualCommon()
1253 LOAD_FUNC_ADDR(cUnit, r7, (int) dvmJitToPatchPredictedChain); in genInvokeVirtualCommon()
[all …]
DArmLIR.h224 r7 = 7, enumerator
/dalvik/vm/mterp/armv5te/
Dheader.S72 #define rINST r7
/dalvik/vm/compiler/codegen/arm/Thumb2/
DGen.cpp308 opRegRegImm(cUnit, kOpAnd, r7, r2, in genMonitorExit()
316 storeWordDisp(cUnit, r1, offsetof(Object, lock), r7); in genMonitorExit()
326 LOAD_FUNC_ADDR(cUnit, r7, (int)dvmUnlockObject); in genMonitorExit()
332 opReg(cUnit, kOpBlx, r7); in genMonitorExit()
DFactory.cpp25 static int coreTemps[] = {r0, r1, r2, r3, r4PC, r7, r8, r9, r10, r11, r12};
/dalvik/vm/compiler/codegen/arm/armv7-a-neon/
DMethodCodegenDriver.cpp46 int returnAddr = r7; in genMethodInflateAndPunt()
/dalvik/vm/compiler/codegen/arm/Thumb/
DFactory.cpp25 static int coreTemps[] = {r0, r1, r2, r3, r4PC, r7};
/dalvik/vm/mterp/out/
DInterpAsm-armv7-a-neon.S79 #define rINST r7
DInterpAsm-armv7-a.S79 #define rINST r7

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