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Searched refs:vC (Results 1 – 23 of 23) sorted by relevance

/dalvik/vm/compiler/
DInlineTransformation.cpp33 return invoke->vC + rank; in convertRegId()
79 getterInsn.vC = convertRegId(&invokeMIR->dalvikInsn, calleeMethod, in inlineGetter()
80 getterInsn.vC, isRange); in inlineGetter()
109 invokeMIR->dalvikInsn.vC = invokeMIRSlow->dalvikInsn.arg[0]; in inlineGetter()
160 setterInsn.vC = convertRegId(&invokeMIR->dalvikInsn, calleeMethod, in inlineSetter()
161 setterInsn.vC, isRange); in inlineSetter()
188 invokeMIR->dalvikInsn.vC = invokeMIRSlow->dalvikInsn.arg[0]; in inlineSetter()
DDataflow.cpp1627 offset = (int) insn->vC; in dvmCompilerGetDalvikDisassembly()
1652 " v%d..v%d", insn->vC, insn->vC + insn->vA - 1); in dvmCompilerGetDalvikDisassembly()
1665 snprintf(buffer + strlen(buffer), 256, ", v%d", insn->vC); in dvmCompilerGetDalvikDisassembly()
1668 snprintf(buffer + strlen(buffer), 256, ", (#%d)", insn->vC); in dvmCompilerGetDalvikDisassembly()
1737 delta = (int) insn->vC; in dvmCompilerFullDisassembler()
1794 snprintf(buffer + strlen(buffer), 256, " #%#x", insn->vC); in dvmCompilerFullDisassembler()
1798 snprintf(buffer + strlen(buffer), 256, " @%#x", insn->vC); in dvmCompilerFullDisassembler()
1909 handleLiveInUse(useV, defV, liveInV, dInsn->vC); in dvmCompilerFindLocalLiveIn()
1911 handleLiveInUse(useV, defV, liveInV, dInsn->vC); in dvmCompilerFindLocalLiveIn()
1912 handleLiveInUse(useV, defV, liveInV, dInsn->vC+1); in dvmCompilerFindLocalLiveIn()
[all …]
DLoop.cpp453 rangeCheckMIR->dalvikInsn.vC = loopAnalysis->endConditionReg; in genHoistedChecks()
DFrontend.cpp151 *target = curOffset + (int) insn->dalvikInsn.vC; in findBlockBoundary()
926 target += (int) insn->dalvikInsn.vC; in processCanBranch()
/dalvik/vm/mterp/armv5te/
DOP_INVOKE_VIRTUAL_QUICK.S16 GET_VREG(r9, r3) @ r9<- vC ("this" ptr)
DOP_EXECUTE_INLINE.S60 ldr r0, [rFP, ip, lsl #2] @ r0<- vC
DOP_FILLED_NEW_ARRAY.S76 GET_VREG(r3, r2) @ r3<- vF/vE/vD/vC
/dalvik/vm/mterp/x86/
DOP_INVOKE_VIRTUAL_QUICK.S16 GET_VREG_R %eax %eax # eax<- vC ("this" ptr)
/dalvik/vm/analysis/
DLiveness.cpp420 GEN(workBits, decInsn.vC); in processInstruction()
427 GEN(workBits, decInsn.vC); in processInstruction()
461 GEN(workBits, decInsn.vC + idx); in processInstruction()
621 GEN(workBits, decInsn.vC); in processInstruction()
628 GEN(workBits, decInsn.vC); in processInstruction()
637 GENW(workBits, decInsn.vC); in processInstruction()
646 GEN(workBits, decInsn.vC); in processInstruction()
665 GENW(workBits, decInsn.vC); in processInstruction()
DDexVerify.cpp587 if (pDecInsn->vA + pDecInsn->vC > registersSize) { in checkVarargRangeRegs()
589 pDecInsn->vA, pDecInsn->vC, registersSize); in checkVarargRangeRegs()
964 okay &= checkTypeIndex(pDvmDex, decInsn.vC); in verifyInstructions()
975 okay &= checkNewArray(pDvmDex, decInsn.vC); in verifyInstructions()
1021 okay &= checkRegisterIndex(meth, decInsn.vC); in verifyInstructions()
1027 okay &= checkRegisterIndex(meth, decInsn.vC); in verifyInstructions()
1034 okay &= checkWideRegisterIndex(meth, decInsn.vC); in verifyInstructions()
1051 okay &= checkWideRegisterIndex(meth, decInsn.vC); in verifyInstructions()
1058 okay &= checkRegisterIndex(meth, decInsn.vC); in verifyInstructions()
1105 okay &= checkFieldIndex(pDvmDex, decInsn.vC); in verifyInstructions()
[all …]
DCodeVerify.cpp1262 getReg = pDecInsn->vC + actualArgs; in verifyInvocationArgs()
1479 thisType = getRegisterType(registerLine, pDecInsn->vC); in getInvocationThis()
1482 pDecInsn->vC, thisType); in getInvocationThis()
2117 && (pDecInsn->vC == 0 || pDecInsn->vC == 1)) in checkLitop()
2135 verifyRegisterType(registerLine, pDecInsn->vC, srcType2, pFailure); in checkBinop()
2138 if (upcastBooleanOp(registerLine, pDecInsn->vB, pDecInsn->vC)) in checkBinop()
3208 getReg = pDecInsn->vC + ui; in verifyFilledNewArrayRegs()
4212 resClass = dvmOptResolveClass(meth->clazz, decInsn.vC, &failure); in verifyInstruction()
4214 const char* badClassDesc = dexStringByTypeIdx(pDexFile, decInsn.vC); in verifyInstruction()
4217 decInsn.vC, badClassDesc, meth->clazz->descriptor); in verifyInstruction()
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/dalvik/libdex/
DInstrUtils.cpp938 pDec->vC = FETCH(1) >> 8; in dexDecodeInstruction()
943 pDec->vC = (s1) (FETCH(1) >> 8); // sign-extend 8-bit value in dexDecodeInstruction()
949 pDec->vC = (s2) FETCH(1); // sign-extend 16-bit value in dexDecodeInstruction()
955 pDec->vC = FETCH(1); in dexDecodeInstruction()
1020 case 1: pDec->vC = pDec->arg[0] = regList & 0x0f; break; in dexDecodeInstruction()
1033 pDec->vC = FETCH(2); in dexDecodeInstruction()
1042 pDec->vC = FETCH(2); in dexDecodeInstruction()
1047 pDec->vC = (s2) FETCH(2); // sign-extend 16-bit value in dexDecodeInstruction()
1063 pDec->vC = FETCH_u4(1); // 32-bit value in dexDecodeInstruction()
1074 pDec->vC = FETCH(4); in dexDecodeInstruction()
DInstrUtils.h139 u4 vC; member
/dalvik/vm/mterp/x86-atom/
DOP_EXECUTE_INLINE_RANGE.S64 movl (rFP, %edx, 4), %edx # rINST<- vC
DOP_EXECUTE_INLINE.S75 movl (rFP, %edx, 4), %edx # rINST<- vC
/dalvik/dexdump/
DDexDump.cpp737 index = pDecInsn->vC; in indexString()
741 index = pDecInsn->vC; in indexString()
947 printf(" v%d, v%d, v%d", pDecInsn->vA, pDecInsn->vB, pDecInsn->vC); in dumpInstruction()
951 pDecInsn->vA, pDecInsn->vB, (s4)pDecInsn->vC, (u1)pDecInsn->vC); in dumpInstruction()
955 s4 targ = (s4) pDecInsn->vC; in dumpInstruction()
965 pDecInsn->vA, pDecInsn->vB, (s4)pDecInsn->vC, (u2)pDecInsn->vC); in dumpInstruction()
1020 printf("v%d", pDecInsn->vC + i); in dumpInstruction()
1022 printf(", v%d", pDecInsn->vC + i); in dumpInstruction()
/dalvik/vm/compiler/codegen/arm/
DCodegenDriver.cpp1014 int srcOffset = dInsn->vC << 2; in genProcessArgsRange()
2301 int lit = mir->dalvikInsn.vC; in handleFmt22b_Fmt22s()
2467 method->clazz->pDvmDex->pResFields[mir->dalvikInsn.vC]; in handleFmt22c_Fmt52c()
2495 (cUnit->method->clazz->pDvmDex->pResClasses[mir->dalvikInsn.vC]); in handleFmt22c_Fmt52c()
2540 (cUnit->method->clazz->pDvmDex->pResClasses[mir->dalvikInsn.vC]); in handleFmt22c_Fmt52c()
2641 int fieldOffset = mir->dalvikInsn.vC; in handleFmt22cs()
3951 RegLocation rlIdxEnd = cUnit->regLocation[mir->dalvikInsn.vC]; in genHoistedChecksForCountUpLoop()
4126 RegLocation rlThis = cUnit->regLocation[mir->dalvikInsn.vC]; in genValidationForPredictedInline()
/dalvik/vm/mterp/out/
DInterpAsm-x86.S7691 GET_VREG_R %eax %eax # eax<- vC ("this" ptr)
7716 GET_VREG_R %eax %eax # eax<- vC ("this" ptr)
DInterpAsm-armv7-a-neon.S11191 GET_VREG(r3, r2) @ r3<- vF/vE/vD/vC
12582 ldr r0, [rFP, ip, lsl #2] @ r0<- vC
DInterpAsm-armv7-a.S11191 GET_VREG(r3, r2) @ r3<- vF/vE/vD/vC
12582 ldr r0, [rFP, ip, lsl #2] @ r0<- vC
DInterpAsm-armv5te.S11559 GET_VREG(r3, r2) @ r3<- vF/vE/vD/vC
13103 ldr r0, [rFP, ip, lsl #2] @ r0<- vC
DInterpAsm-armv5te-vfp.S11237 GET_VREG(r3, r2) @ r3<- vF/vE/vD/vC
12645 ldr r0, [rFP, ip, lsl #2] @ r0<- vC
DInterpAsm-x86-atom.S26800 movl (rFP, %edx, 4), %edx # rINST<- vC