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Searched refs:CR0_PG_MASK (Results 1 – 4 of 4) sorted by relevance

/external/qemu/target-i386/
Dhelper.c869 if ((new_cr0 & (CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK)) != in cpu_x86_update_cr0()
870 (env->cr[0] & (CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK))) { in cpu_x86_update_cr0()
875 if (!(env->cr[0] & CR0_PG_MASK) && (new_cr0 & CR0_PG_MASK) && in cpu_x86_update_cr0()
883 } else if ((env->cr[0] & CR0_PG_MASK) && !(new_cr0 & CR0_PG_MASK) && in cpu_x86_update_cr0()
908 if (env->cr[0] & CR0_PG_MASK) { in cpu_x86_update_cr3()
992 if (!(env->cr[0] & CR0_PG_MASK)) { in cpu_x86_handle_mmu_fault()
1330 if (!(env->cr[0] & CR0_PG_MASK)) { in cpu_get_phys_page_debug()
Dcpu.h199 #define CR0_PG_MASK (1 << 31) macro
Dop_helper.c434 if ((type & 8) && (env->cr[0] & CR0_PG_MASK)) { in switch_tss()
1510 env->cr[0] & ~(CR0_PE_MASK | CR0_EM_MASK | CR0_TS_MASK | CR0_PG_MASK)); in do_smm_enter()
/external/qemu/
Dmonitor.c1253 if (!(env->cr[0] & CR0_PG_MASK)) { in tlb_info()
1311 if (!(env->cr[0] & CR0_PG_MASK)) { in mem_info()