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Searched refs:FABS (Results 1 – 15 of 15) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h450 FNEG, FABS, FSQRT, FSIN, FCOS, FPOWI, FPOW, enumerator
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp169 case ISD::FABS: in LegalizeOp()
DDAGCombiner.cpp1099 case ISD::FABS: return visitFABS(N); in visit()
5024 if ((N0.getOpcode() == ISD::FNEG || N0.getOpcode() == ISD::FABS) && in visitBITCAST()
5034 assert(N0.getOpcode() == ISD::FABS); in visitBITCAST()
5426 if (!LegalOperations || TLI.isOperationLegal(ISD::FABS, VT)) in visitFCOPYSIGN()
5427 return DAG.getNode(ISD::FABS, N->getDebugLoc(), VT, N0); in visitFCOPYSIGN()
5431 DAG.getNode(ISD::FABS, N0.getDebugLoc(), VT, N0)); in visitFCOPYSIGN()
5438 if (N0.getOpcode() == ISD::FABS || N0.getOpcode() == ISD::FNEG || in visitFCOPYSIGN()
5444 if (N1.getOpcode() == ISD::FABS) in visitFCOPYSIGN()
5445 return DAG.getNode(ISD::FABS, N->getDebugLoc(), VT, N0); in visitFCOPYSIGN()
5667 return DAG.getNode(ISD::FABS, N->getDebugLoc(), VT, N0); in visitFABS()
[all …]
DLegalizeFloatTypes.cpp65 case ISD::FABS: R = SoftenFloatRes_FABS(N); break; in SoftenFloatResult()
842 case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break; in ExpandFloatResult()
895 Hi = DAG.getNode(ISD::FABS, dl, Tmp.getValueType(), Tmp); in ExpandFloatRes_FABS()
DLegalizeVectorTypes.cpp71 case ISD::FABS: in ScalarizeVectorResult()
447 case ISD::FABS: in SplitVectorResult()
1278 case ISD::FABS: in WidenVectorResult()
DSelectionDAG.cpp2417 case ISD::FABS: in getNode()
2587 case ISD::FABS: in getNode()
2589 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0)); in getNode()
5849 case ISD::FABS: return "fabs"; in getOperationName()
DLegalizeDAG.cpp1895 SDValue AbsVal = DAG.getNode(ISD::FABS, dl, Tmp1.getValueType(), Tmp1); in ExpandFCOPYSIGN()
3245 case ISD::FABS: { in ExpandNode()
DSelectionDAGBuilder.cpp5317 setValue(&I, DAG.getNode(ISD::FABS, getCurDebugLoc(), in visitCall()
/external/llvm/lib/Target/Mips/
DMipsInstrFPU.td129 defm FABS : FFR1_2<0b000101, "abs", fabs>;
/external/llvm/lib/Target/CellSPU/
DSPUISelDAGToDAG.cpp830 } else if (Opc == ISD::FABS) { in Select()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td357 def fabs : SDNode<"ISD::FABS" , SDTFPUnaryOp>;
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp572 setOperationAction(ISD::FABS , MVT::f64, Custom); in X86TargetLowering()
573 setOperationAction(ISD::FABS , MVT::f32, Custom); in X86TargetLowering()
604 setOperationAction(ISD::FABS , MVT::f32, Custom); in X86TargetLowering()
721 setOperationAction(ISD::FABS, (MVT::SimpleValueType)VT, Expand); in X86TargetLowering()
9316 case ISD::FABS: return LowerFABS(Op, DAG); in LowerOperation()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp458 setOperationAction(ISD::FABS, MVT::v2f64, Expand); in ARMTargetLowering()
/external/sqlite/dist/
Dsqlite3.c120934 #define FABS(a) ((a)<0.0?-1.0*(a):(a))
120943 float diff = FABS(right-left);
Dsqlite3.c.orig120903 #define FABS(a) ((a)<0.0?-1.0*(a):(a))
120912 float diff = FABS(right-left);