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Searched refs:INSN_OP3 (Results 1 – 1 of 1) sorted by relevance

/external/qemu/tcg/sparc/
Dtcg-target.c190 #define INSN_OP3(x) ((x) << 19) macro
224 #define ARITH_ADD (INSN_OP(2) | INSN_OP3(0x00))
225 #define ARITH_ADDCC (INSN_OP(2) | INSN_OP3(0x10))
226 #define ARITH_AND (INSN_OP(2) | INSN_OP3(0x01))
227 #define ARITH_ANDN (INSN_OP(2) | INSN_OP3(0x05))
228 #define ARITH_OR (INSN_OP(2) | INSN_OP3(0x02))
229 #define ARITH_ORCC (INSN_OP(2) | INSN_OP3(0x12))
230 #define ARITH_ORN (INSN_OP(2) | INSN_OP3(0x06))
231 #define ARITH_XOR (INSN_OP(2) | INSN_OP3(0x03))
232 #define ARITH_SUB (INSN_OP(2) | INSN_OP3(0x04))
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