Searched refs:Imm8 (Results 1 – 8 of 8) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| D | ARMAddressingModes.h | 554 unsigned Imm8 = getNEONModImmVal(ModImm); in decodeNEONModImm() local
559 Val = Imm8; in decodeNEONModImm()
564 Val = Imm8 << (8 * ByteNum); in decodeNEONModImm()
569 Val = Imm8 << (8 * ByteNum); in decodeNEONModImm()
574 Val = (Imm8 << (8 * ByteNum)) | (0xffff >> (8 * (2 - ByteNum))); in decodeNEONModImm()
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| D | ARMMCCodeEmitter.cpp | 668 unsigned Reg, Imm8; in getT2AddrModeImm8s4OpValue() local
674 Imm8 = 0; in getT2AddrModeImm8s4OpValue()
684 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups); in getT2AddrModeImm8s4OpValue()
686 uint32_t Binary = (Imm8 >> 2) & 0xff; in getT2AddrModeImm8s4OpValue()
832 uint32_t Imm8 = ARM_AM::getAM3Offset(Imm); in getAddrMode3OffsetOpValue() local
835 Imm8 = getARMRegisterNumbering(MO.getReg()); in getAddrMode3OffsetOpValue()
836 return Imm8 | (isAdd << 8) | (isImm << 9); in getAddrMode3OffsetOpValue()
854 uint32_t Imm8 = ARM_AM::getAM3Offset(Imm); in getAddrMode3OpValue() local
857 Imm8 = getARMRegisterNumbering(MO1.getReg()); in getAddrMode3OpValue()
858 return (Rn << 9) | Imm8 | (isAdd << 8) | (isImm << 13); in getAddrMode3OpValue()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrFormats.td | 54 def Imm8 : ImmType<1>;
188 : X86Inst<o, f, Imm8, outs, ins, asm, d> {
302 // PSIi8 - SSE1 instructions with ImmT == Imm8 and TB prefix.
330 // SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
331 // SSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix.
333 // PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes.
401 // SS41AIi8 - SSE 4.1 instructions with TA prefix and ImmT == Imm8.
435 // AVXAIi8 - AVX instructions with TA, OpSize prefix and ImmT = Imm8.
511 // MMXIi8 - MMX instructions with ImmT == Imm8 and TB prefix.
512 // MMXIi8 - MMX instructions with ImmT == Imm8 and TB prefix.
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| D | X86InstrInfo.h | 395 Imm8 = 1 << ImmShift, enumerator
506 case X86II::Imm8: in getSizeOfImm()
525 case X86II::Imm8: in isImmPCRel()
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| D | X86InstrArithmetic.td | 528 /// example, i8 -> Imm8, i16 -> Imm16, i32 -> Imm32. Note that i64 -> Imm32
570 Imm8 , i8imm , imm, i8imm , invalid_node,
733 let ImmT = Imm8; // Always 8-bit immediate.
832 let ImmT = Imm8; // Always 8-bit immediate.
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| D | X86InstrSSE.td | 2623 // SSE2 with ImmT == Imm8 and XS prefix.
2627 // SSE2 with ImmT == Imm8 and XD prefix.
2636 // SSE2 with ImmT == Imm8 and XS prefix.
2639 // SSE2 with ImmT == Imm8 and XD prefix.
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ThumbDisassemblerCore.h | 968 unsigned Imm8 = getT1Imm8(insn); in DisassembleThumb1CondBr() local
970 Opcode == ARM::tBcc ? SignExtend32<9>(Imm8 << 1) in DisassembleThumb1CondBr()
971 : (int)Imm8)); in DisassembleThumb1CondBr()
1935 unsigned Imm8 = getImm8(insn); in DisassembleThumb2PreLoad() local
1936 Offset = -1 * Imm8; in DisassembleThumb2PreLoad()
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| D | ARMDisassemblerCore.cpp | 2063 unsigned char Imm8 = insn & 0xFF; in DisassembleVFPLdStFrm() local
2064 MI.addOperand(MCOperand::CreateImm(ARM_AM::getAM5Opc(AddrOpcode, Imm8))); in DisassembleVFPLdStFrm()
2117 unsigned char Imm8 = insn & 0xFF; in DisassembleVFPLdStMulFrm() local
2118 unsigned Regs = isSPVFP ? Imm8 : Imm8/2; in DisassembleVFPLdStMulFrm()
2270 unsigned char Imm8 = ((insn >> 24) & 1) << 7 | in decodeN1VImm() local
2273 return (op << 12) | (cmode << 8) | Imm8; in decodeN1VImm()
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