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Searched refs:MII (Results 1 – 23 of 23) sorted by relevance

/external/llvm/lib/Target/ARM/
DMLxExpansionPass.cpp247 MachineBasicBlock::iterator MII = MI; in ExpandFPMLxInstruction()
248 MII = llvm::prior(MII); in ExpandFPMLxInstruction()
249 MachineInstr &MI2 = *MII; in ExpandFPMLxInstruction()
250 MII = llvm::prior(MII); in ExpandFPMLxInstruction()
251 MachineInstr &MI1 = *MII; in ExpandFPMLxInstruction()
267 MachineBasicBlock::reverse_iterator MII = MBB.rbegin(), E = MBB.rend(); in ExpandFPMLxInstructions() local
268 while (MII != E) { in ExpandFPMLxInstructions()
269 MachineInstr *MI = &*MII; in ExpandFPMLxInstructions()
272 ++MII; in ExpandFPMLxInstructions()
280 ++MII; in ExpandFPMLxInstructions()
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DNEONMoveFix.cpp57 MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); in InsertMoves() local
59 for (; MII != E; MII = NextMII) { in InsertMoves()
60 NextMII = llvm::next(MII); in InsertMoves()
61 MachineInstr *MI = &*MII; in InsertMoves()
DThumb2SizeReduction.cpp812 MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); in ReduceMBB() local
814 for (; MII != E; MII = NextMII) { in ReduceMBB()
815 NextMII = llvm::next(MII); in ReduceMBB()
817 MachineInstr *MI = &*MII; in ReduceMBB()
/external/llvm/lib/CodeGen/
DVirtRegRewriter.cpp675 MachineBasicBlock::iterator &MII, in ReMaterialize() argument
686 TII->reMaterialize(MBB, MII, DestReg, 0, ReMatDefMI, *TRI); in ReMaterialize()
687 MachineInstr *NewMI = prior(MII); in ReMaterialize()
1020 static unsigned FindFreeRegister(MachineBasicBlock::iterator MII, in FindFreeRegister() argument
1033 if (MII == MBB.begin()) in FindFreeRegister()
1035 MachineInstr *PrevMI = prior(MII); in FindFreeRegister()
1036 MII = PrevMI; in FindFreeRegister()
1123 MachineBasicBlock::iterator &MII,
1129 bool OptimizeByUnfold(MachineBasicBlock::iterator &MII,
1135 bool CommuteToFoldReload(MachineBasicBlock::iterator &MII,
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DStackSlotColoring.cpp135 bool PropagateBackward(MachineBasicBlock::iterator MII,
138 bool PropagateForward(MachineBasicBlock::iterator MII,
185 for (MachineBasicBlock::iterator MII = MBB->begin(), EE = MBB->end(); in ScanForSpillSlotRefs() local
186 MII != EE; ++MII) { in ScanForSpillSlotRefs()
187 MachineInstr *MI = &*MII; in ScanForSpillSlotRefs()
495 bool StackSlotColoring::PropagateBackward(MachineBasicBlock::iterator MII, in PropagateBackward() argument
498 if (MII == MBB->begin()) in PropagateBackward()
503 while (--MII != MBB->begin()) { in PropagateBackward()
507 const MCInstrDesc &MCID = MII->getDesc(); in PropagateBackward()
508 for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) { in PropagateBackward()
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DOptimizePHIs.cpp158 MII = MBB.begin(), E = MBB.end(); MII != E; ) { in OptimizeBB() local
159 MachineInstr *MI = &*MII++; in OptimizeBB()
181 if (&*MII == PhiMI) in OptimizeBB()
182 ++MII; in OptimizeBB()
DPeepholeOptimizer.cpp421 MII = I->begin(), MIE = I->end(); MII != MIE; ) { in runOnMachineFunction() local
422 MachineInstr *MI = &*MII; in runOnMachineFunction()
428 ++MII; in runOnMachineFunction()
438 MII = First ? I->begin() : llvm::next(PMII); in runOnMachineFunction()
445 MII = First ? I->begin() : llvm::next(PMII); in runOnMachineFunction()
459 PMII = MII; in runOnMachineFunction()
460 ++MII; in runOnMachineFunction()
DMachineLICM.cpp456 MII = BB->begin(), E = BB->end(); MII != E; ++MII) { in HoistRegionPostRA() local
457 MachineInstr *MI = &*MII; in HoistRegionPostRA()
503 MII = BB->begin(), E = BB->end(); MII != E; ++MII) { in AddToLiveIns() local
504 MachineInstr *MI = &*MII; in AddToLiveIns()
575 MII = BB->begin(), E = BB->end(); MII != E; ) { in HoistRegion() local
576 MachineBasicBlock::iterator NextMII = MII; ++NextMII; in HoistRegion()
577 MachineInstr *MI = &*MII; in HoistRegion()
580 MII = NextMII; in HoistRegion()
616 for (MachineBasicBlock::iterator MII = BB->begin(), E = BB->end(); in InitRegPressure() local
617 MII != E; ++MII) { in InitRegPressure()
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DDeadMachineInstructionElim.cpp124 for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(), in runOnMachineFunction() local
125 MIE = MBB->rend(); MII != MIE; ) { in runOnMachineFunction()
126 MachineInstr *MI = &*MII; in runOnMachineFunction()
195 ++MII; in runOnMachineFunction()
DLowerSubregs.cpp78 for (MachineBasicBlock::iterator MII = in TransferDeadFlag() local
79 prior(MachineBasicBlock::iterator(MI)); ; --MII) { in TransferDeadFlag()
80 if (MII->addRegisterDead(DstReg, TRI)) in TransferDeadFlag()
82 assert(MII != MI->getParent()->begin() && in TransferDeadFlag()
DVirtRegMap.cpp271 for (MachineBasicBlock::iterator MII = MBBI->begin(), MIE = MBBI->end(); in rewrite() local
272 MII != MIE;) { in rewrite()
273 MachineInstr *MI = MII; in rewrite()
274 ++MII; in rewrite()
DInlineSpiller.cpp517 MachineBasicBlock::iterator MII; in hoistSpill() local
519 MII = MBB->SkipPHIsAndLabels(MBB->begin()); in hoistSpill()
523 MII = DefMI; in hoistSpill()
524 ++MII; in hoistSpill()
527 TII.storeRegToStackSlot(*MBB, MII, SVI.SpillReg, false, StackSlot, in hoistSpill()
529 --MII; // Point to store instruction. in hoistSpill()
530 LIS.InsertMachineInstrInMaps(MII); in hoistSpill()
531 VRM.addSpillSlotUse(StackSlot, MII); in hoistSpill()
532 DEBUG(dbgs() << "\thoisted: " << SVI.SpillVNI->def << '\t' << *MII); in hoistSpill()
DScheduleDAGInstrs.cpp227 for (MachineBasicBlock::iterator MII = InsertPos, MIE = Begin; in BuildSchedGraph() local
228 MII != MIE; --MII) { in BuildSchedGraph()
229 MachineInstr *MI = prior(MII); in BuildSchedGraph()
DRegAllocFast.cpp760 MachineBasicBlock::iterator MII = MBB->begin(); in AllocateBasicBlock() local
766 definePhysReg(MII, *I, regReserved); in AllocateBasicBlock()
772 while (MII != MBB->end()) { in AllocateBasicBlock()
773 MachineInstr *MI = MII++; in AllocateBasicBlock()
DRegisterCoalescer.cpp732 MachineBasicBlock::iterator MII = in ReMaterializeTrivialDef() local
734 tii_->reMaterialize(*MBB, MII, DstReg, DstSubIdx, DefMI, *tri_); in ReMaterializeTrivialDef()
735 MachineInstr *NewMI = prior(MII); in ReMaterializeTrivialDef()
1538 for (MachineBasicBlock::iterator MII = MBB->begin(), E = MBB->end(); in CopyCoalesceInMBB() local
1539 MII != E;) { in CopyCoalesceInMBB()
1540 MachineInstr *Inst = MII++; in CopyCoalesceInMBB()
/external/llvm/lib/Target/PTX/
DPTXInstrInfo.cpp295 MachineBasicBlock::iterator MII, in storeRegToStackSlot() argument
299 MachineInstr& MI = *MII; in storeRegToStackSlot()
322 MachineInstrBuilder MIB = BuildMI(MBB, MII, DL, get(OpCode)); in storeRegToStackSlot()
330 MachineBasicBlock::iterator MII, in loadRegFromStackSlot() argument
334 MachineInstr& MI = *MII; in loadRegFromStackSlot()
357 MachineInstrBuilder MIB = BuildMI(MBB, MII, DL, get(OpCode)); in loadRegFromStackSlot()
DPTXInstrInfo.h103 MachineBasicBlock::iterator MII,
108 MachineBasicBlock::iterator MII,
/external/llvm/lib/Target/MBlaze/
DMBlazeFrameLowering.cpp64 for (MachineInstr::mop_iterator MII = MIB; MII != MIE; ++MII) { in replaceFrameIndexes() local
65 if (!MII->isFI() || MII->getIndex() != FRI->first) continue; in replaceFrameIndexes()
66 DEBUG(dbgs() << "FOUND FI#" << MII->getIndex() << "\n"); in replaceFrameIndexes()
67 MII->setIndex(NFI); in replaceFrameIndexes()
/external/grub/netboot/
D3c90x.txt93 you want to use (i.e., 10/100 rj45, AUI, coax, MII).
152 unless the card is set internally to the MII transceiver, it will only
156 MII transceivers, and even the .lzrom image ends up being just a little
162 configuration to use MII when it boots. The 3c905b driver does this
185 6 MII
187 9 MII External MAC Mode
202 up in MII mode, and the driver checks the LanWorks register to find
213 setting MII mode on bootup. Linux 2.0.35 does not have this problem.
/external/clang/lib/Lex/
DPPDirectives.cpp1643 IdentifierInfo *MII = MacroNameTok.getIdentifierInfo(); in HandleIfdefDirective() local
1644 MacroInfo *MI = getMacroInfo(MII); in HandleIfdefDirective()
1653 CurPPLexer->MIOpt.EnterTopLevelIFNDEF(MII); in HandleIfdefDirective()
/external/icu4c/data/unidata/
Dconfusables.txt312 14B0 ; 00B7 14A6 ; SL # ( ᒰ → ·ᒦ ) CANADIAN SYLLABICS MWII → MIDDLE DOT, CANADIAN SYLLABICS MII # →…
3898 14B1 ; 14A6 00B7 ; SL # ( ᒱ → ᒦ· ) CANADIAN SYLLABICS WEST-CREE MWII → CANADIAN SYLLABICS MII, MIDD…
7770 14B0 ; 00B7 14A6 ; SA # ( ᒰ → ·ᒦ ) CANADIAN SYLLABICS MWII → MIDDLE DOT, CANADIAN SYLLABICS MII # →…
11886 14B1 ; 14A6 00B7 ; SA # ( ᒱ → ᒦ· ) CANADIAN SYLLABICS WEST-CREE MWII → CANADIAN SYLLABICS MII, MIDD…
15621 14B0 ; 00B7 14A6 ; ML # ( ᒰ → ·ᒦ ) CANADIAN SYLLABICS MWII → MIDDLE DOT, CANADIAN SYLLABICS MII # →…
19424 14B1 ; 14A6 00B7 ; ML # ( ᒱ → ᒦ· ) CANADIAN SYLLABICS WEST-CREE MWII → CANADIAN SYLLABICS MII, MIDD…
23343 14B0 ; 00B7 14A6 ; MA # ( ᒰ → ·ᒦ ) CANADIAN SYLLABICS MWII → MIDDLE DOT, CANADIAN SYLLABICS MII # →…
27778 14B1 ; 14A6 00B7 ; MA # ( ᒱ → ᒦ· ) CANADIAN SYLLABICS WEST-CREE MWII → CANADIAN SYLLABICS MII, MIDD…
DUnicodeData.txt4457 14A6;CANADIAN SYLLABICS MII;Lo;0;L;;;;;N;;;;;
/external/icu4c/test/testdata/
Dconfusables.txt312 14B0 ; 00B7 14A6 ; SL # ( ᒰ → ·ᒦ ) CANADIAN SYLLABICS MWII → MIDDLE DOT, CANADIAN SYLLABICS MII # →…
3898 14B1 ; 14A6 00B7 ; SL # ( ᒱ → ᒦ· ) CANADIAN SYLLABICS WEST-CREE MWII → CANADIAN SYLLABICS MII, MIDD…
7770 14B0 ; 00B7 14A6 ; SA # ( ᒰ → ·ᒦ ) CANADIAN SYLLABICS MWII → MIDDLE DOT, CANADIAN SYLLABICS MII # →…
11886 14B1 ; 14A6 00B7 ; SA # ( ᒱ → ᒦ· ) CANADIAN SYLLABICS WEST-CREE MWII → CANADIAN SYLLABICS MII, MIDD…
15621 14B0 ; 00B7 14A6 ; ML # ( ᒰ → ·ᒦ ) CANADIAN SYLLABICS MWII → MIDDLE DOT, CANADIAN SYLLABICS MII # →…
19424 14B1 ; 14A6 00B7 ; ML # ( ᒱ → ᒦ· ) CANADIAN SYLLABICS WEST-CREE MWII → CANADIAN SYLLABICS MII, MIDD…
23343 14B0 ; 00B7 14A6 ; MA # ( ᒰ → ·ᒦ ) CANADIAN SYLLABICS MWII → MIDDLE DOT, CANADIAN SYLLABICS MII # →…
27778 14B1 ; 14A6 00B7 ; MA # ( ᒱ → ᒦ· ) CANADIAN SYLLABICS WEST-CREE MWII → CANADIAN SYLLABICS MII, MIDD…