Searched refs:MemIndexedMode (Results 1 – 15 of 15) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 279 ISD::MemIndexedMode &AM,
287 ISD::MemIndexedMode &AM,
|
| D | ARMISelDAGToDAG.cpp | 689 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2Offset()
779 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode3Offset()
865 ISD::MemIndexedMode AM = LdSt->getAddressingMode(); in SelectAddrMode6Offset()
1181 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectT2AddrModeImm8Offset()
1260 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectARMIndexedLoad()
1307 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectT2IndexedLoad()
|
| D | ARMISelLowering.cpp | 7406 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
7445 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 661 enum MemIndexedMode { enum
|
| D | SelectionDAGNodes.h | 605 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
1526 unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM,
1542 ISD::MemIndexedMode getAddressingMode() const {
1543 return ISD::MemIndexedMode((SubclassData >> 2) & 7);
1564 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
1595 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
|
| D | SelectionDAG.h | 643 SDValue Offset, ISD::MemIndexedMode AM);
644 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
650 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
671 SDValue Offset, ISD::MemIndexedMode AM);
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.h | 173 ISD::MemIndexedMode &AM,
|
| D | MSP430ISelDAGToDAG.cpp | 303 ISD::MemIndexedMode AM = LD->getAddressingMode(); in isValidIndexedLoad()
|
| D | MSP430ISelLowering.cpp | 942 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 256 ISD::MemIndexedMode &AM,
|
| D | PPCISelLowering.cpp | 1050 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 682 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
692 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
718 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
724 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
|
| D | TargetLowering.h | 722 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
732 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 475 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile, in encodeMemSDNodeFlags()
4034 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
4064 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
4133 SDValue Offset, ISD::MemIndexedMode AM) { in getIndexedLoad()
4264 SDValue Offset, ISD::MemIndexedMode AM) { in getIndexedStore()
6019 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { in getIndexedModeName()
|
| D | DAGCombiner.cpp | 5910 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPreIndexedLoadStore()
6045 ISD::MemIndexedMode AM = ISD::UNINDEXED; in CombineToPostIndexedLoadStore()
|