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Searched refs:N0 (Results 1 – 25 of 40) sorted by relevance

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/external/clang/test/CXX/temp/temp.spec/temp.expl.spec/
Dp2.cpp18 namespace N0 { namespace
33 template<> void N0::f0(int) { } // okay in f0()
36 template<> void N0::f0(long) { } // expected-error{{not in a namespace enclosing}} in f0()
39 template<> void N0::f0(double) { } // expected-warning{{originally be declared}} in f0()
48 namespace N0 { namespace
72 void N0::X0<T>::ft1(T t, U u) { in ft1()
76 template<typename T> T N0::X0<T>::member;
78 template<> struct N0::X0<void> { }; // expected-warning{{originally}}
79 N0::X0<void> test_X0;
82 template<> struct N0::X0<const void> { }; // expected-error{{originally}}
[all …]
Dp2-0x.cpp18 namespace N0 { namespace
33 template<> void N0::f0(int) { } // okay in f0()
36 template<> void N0::f0(long) { } // expected-error{{not in a namespace enclosing}} in f0()
39 template<> void N0::f0(double) { } in f0()
48 namespace N0 { namespace
72 void N0::X0<T>::ft1(T t, U u) { in ft1()
76 template<typename T> T N0::X0<T>::member;
78 template<> struct N0::X0<void> { };
79 N0::X0<void> test_X0;
82 …template<> struct N0::X0<const void> { }; // expected-error{{class template specialization of 'X0'…
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp229 SDValue SimplifySelect(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2);
230 SDValue SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2,
233 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
241 SDValue MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
243 SDValue MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1);
524 SDValue N0, N1, N2; in isOneUseSetCC() local
525 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse()) in isOneUseSetCC()
531 SDValue N0, SDValue N1) { in ReassociateOps() argument
532 EVT VT = N0.getValueType(); in ReassociateOps()
533 if (N0.getOpcode() == Opc && isa<ConstantSDNode>(N0.getOperand(1))) { in ReassociateOps()
[all …]
DTargetLowering.cpp1906 TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, in SimplifySetCC() argument
1922 if (isa<ConstantSDNode>(N0.getNode())) in SimplifySetCC()
1923 return DAG.getSetCC(dl, VT, N1, N0, ISD::getSetCCSwappedOperands(Cond)); in SimplifySetCC()
1931 if (N0.getOpcode() == ISD::SRL && (C1 == 0 || C1 == 1) && in SimplifySetCC()
1932 N0.getOperand(0).getOpcode() == ISD::CTLZ && in SimplifySetCC()
1933 N0.getOperand(1).getOpcode() == ISD::Constant) { in SimplifySetCC()
1935 = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue(); in SimplifySetCC()
1937 ShAmt == Log2_32(N0.getValueType().getSizeInBits())) { in SimplifySetCC()
1947 SDValue Zero = DAG.getConstant(0, N0.getValueType()); in SimplifySetCC()
1948 return DAG.getSetCC(dl, VT, N0.getOperand(0).getOperand(0), in SimplifySetCC()
[all …]
DInstrEmitter.cpp479 SDValue N0 = Node->getOperand(0); in EmitSubregNode() local
505 const ConstantSDNode *SD = cast<ConstantSDNode>(N0); in EmitSubregNode()
508 AddOperand(MI, N0, 0, 0, VRBaseMap, /*IsDebug=*/false, in EmitSubregNode()
/external/llvm/include/llvm/ADT/
DStringSwitch.h84 template<unsigned N0, unsigned N1>
85 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
90 template<unsigned N0, unsigned N1, unsigned N2>
91 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
96 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3>
97 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
103 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3, unsigned N4>
104 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() argument
/external/openssl/crypto/bn/asm/
Dppc64-mont.pl135 $N0="f14"; $N1="f15"; $N2="f16"; $N3="f17";
298 lfd $N0,`$FRAME+96`($sp)
306 fcfid $N0,$N0
323 stfd $N0,40($nap_d) ; save n[j] in double format
345 fmadd $T0a,$N0,$na,$T0a
346 fmadd $T0b,$N0,$nb,$T0b
348 fmadd $T1a,$N0,$nc,$T1a
349 fmadd $T1b,$N0,$nd,$T1b
405 lfd $N0,`$FRAME+96`($sp)
413 fcfid $N0,$N0
[all …]
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp614 SDValue N0 = N.getOperand(0); in MatchWrapper() local
627 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in MatchWrapper()
635 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in MatchWrapper()
644 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in MatchWrapper()
647 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) { in MatchWrapper()
651 AM.BlockAddr = cast<BlockAddressSDNode>(N0)->getBlockAddress(); in MatchWrapper()
652 AM.SymbolFlags = cast<BlockAddressSDNode>(N0)->getTargetFlags(); in MatchWrapper()
666 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in MatchWrapper()
670 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in MatchWrapper()
675 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in MatchWrapper()
[all …]
DX86ISelLowering.cpp6158 SDValue N0 = Op.getOperand(0); in LowerINSERT_VECTOR_ELT_SSE4() local
6178 return DAG.getNode(Opc, dl, VT, N0, N1, N2); in LowerINSERT_VECTOR_ELT_SSE4()
6191 return DAG.getNode(X86ISD::INSERTPS, dl, VT, N0, N1, N2); in LowerINSERT_VECTOR_ELT_SSE4()
6205 SDValue N0 = Op.getOperand(0); in LowerINSERT_VECTOR_ELT() local
6220 SDValue SubN0 = Extract128BitVector(N0, N2, DAG, dl); in LowerINSERT_VECTOR_ELT()
6234 return Insert128BitVector(N0, Op, N2, DAG, dl); in LowerINSERT_VECTOR_ELT()
6250 return DAG.getNode(X86ISD::PINSRW, dl, VT, N0, N1, N2); in LowerINSERT_VECTOR_ELT()
6964 SDValue N0 = Op.getOperand(0); in LowerUINT_TO_FP() local
6970 if (DAG.SignBitIsZero(N0)) in LowerUINT_TO_FP()
6971 return DAG.getNode(ISD::SINT_TO_FP, dl, Op.getValueType(), N0); in LowerUINT_TO_FP()
[all …]
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp4554 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt() local
4556 return N0->hasOneUse() && N1->hasOneUse() && in isAddSubSExt()
4557 isSignExtended(N0, DAG) && isSignExtended(N1, DAG); in isAddSubSExt()
4565 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt() local
4567 return N0->hasOneUse() && N1->hasOneUse() && in isAddSubZExt()
4568 isZeroExtended(N0, DAG) && isZeroExtended(N1, DAG); in isAddSubZExt()
4578 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL() local
4582 bool isN0SExt = isSignExtended(N0, DAG); in LowerMUL()
4587 bool isN0ZExt = isZeroExtended(N0, DAG); in LowerMUL()
4594 if (isN1SExt && isAddSubSExt(N0, DAG)) { in LowerMUL()
[all …]
/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp145 SDValue N0 = N.getOperand(0); in MatchWrapper() local
147 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) { in MatchWrapper()
151 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) { in MatchWrapper()
156 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) { in MatchWrapper()
159 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) { in MatchWrapper()
163 AM.BlockAddr = cast<BlockAddressSDNode>(N0)->getBlockAddress(); in MatchWrapper()
/external/clang/test/CXX/basic/basic.lookup/basic.lookup.unqual/
Dp3.cpp5 namespace N0 { namespace
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp593 SDValue N0 = Op.getOperand(0); in isADDADDMUL() local
597 if (N0.getOpcode() == ISD::ADD) { in isADDADDMUL()
598 AddOp = N0; in isADDADDMUL()
602 OtherOp = N0; in isADDADDMUL()
1325 SDValue N0 = N->getOperand(0); in PerformDAGCombine() local
1328 ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0); in PerformDAGCombine()
1330 EVT VT = N0.getValueType(); in PerformDAGCombine()
1334 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2); in PerformDAGCombine()
1354 SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2); in PerformDAGCombine()
1362 SDValue N0 = N->getOperand(0); in PerformDAGCombine() local
[all …]
/external/clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct.default/
Dp4.cpp11 namespace N0 { namespace
/external/clang/test/SemaCXX/
Dlinkage-spec.cpp30 namespace N0 { namespace
/external/clang/test/CXX/temp/temp.arg/temp.arg.type/
Dp2.cpp22 namespace N0 { namespace
/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp605 SDValue N0 = Node->getOperand(0); in Select() local
629 Dividend = CurDAG->getMachineNode(SystemZ::MOVSX64rr32, dl, MVT::i64, N0); in Select()
631 Dividend = N0.getNode(); in Select()
685 SDValue N0 = Node->getOperand(0); in Select() local
709 SDNode *Dividend = N0.getNode(); in Select()
/external/llvm/lib/Target/CellSPU/
DSPUISelLowering.cpp2189 SDValue N0 = Op.getOperand(0); // Everything has at least one operand in LowerI8Math() local
2191 EVT ShiftVT = TLI.getShiftAmountTy(N0.getValueType()); in LowerI8Math()
2203 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N0); in LowerI8Math()
2206 DAG.getNode(Opc, dl, MVT::i16, N0, N1)); in LowerI8Math()
2214 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i16, N0); in LowerI8Math()
2217 DAG.getNode(Opc, dl, MVT::i16, N0, N1)); in LowerI8Math()
2224 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, N0); in LowerI8Math()
2234 DAG.getNode(ISD::OR, dl, MVT::i16, N0, in LowerI8Math()
2236 N0, DAG.getConstant(8, MVT::i32))); in LowerI8Math()
2247 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, N0); in LowerI8Math()
[all …]
/external/bison/src/
Dreduce.c69 useful_production (rule_number r, bitset N0) in useful_production() argument
77 if (ISVAR (*rhsp) && !bitset_test (N0, *rhsp - ntokens)) in useful_production()
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/de-DE/
Dde-DE_gl0_kdt_mgc2.pkb64 '=ϰl K@@����#��4�����z`ѤB���60���3�.;����@����t_�mN0���9ù�)
/external/quake/quake/src/WinQuake/data/
DTECHINFO.TXT1165 COM2 baud 14400 modem startup AT\N0%C0B8 enable
1172 COM2 baud 57600 modem startup AT\N0%C0B8 enable
1230 AT S46=0 S37=9 N0 &Q0 &D2 &K4
1236 AT S46=0 S37=9 N0 &Q0 &D2 &K0 %C0
1239 AT &F N0 S37=9 &Q0 &D2 \N1
1242 AT Z \N0 &D2 &K0 S48=48
1251 AT S46=0 S37=9 N0 &Q0 &D2 &K0 %C0
1260 AT \N0 %C0 B8
1263 AT S46=0 S37=9 N0 &Q0 &D2 %C0 \G0 &K0
1269 AT &Q6 &K S37=9 N %C0 \N0
[all …]
/external/llvm/lib/Target/Alpha/
DAlphaISelDAGToDAG.cpp233 SDValue N0 = N->getOperand(0); in Select() local
240 Chain = CurDAG->getCopyToReg(Chain, dl, Alpha::R27, N0, in Select()
/external/clang/test/SemaTemplate/
Dinstantiate-member-template.cpp120 namespace N0 { namespace
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp854 SDValue N0 = N->getOperand(0); in Select() local
858 N0, getI32Imm(Log2_32(Imm))); in Select()
864 N0, getI32Imm(Log2_32(-Imm))); in Select()
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/en-GB/
Den-GB_kdt_g2p.pkb316 �����*lVv�6$�'M����q ��ߊp)85���9N0�E$b� ����-��b����T�FZp�*G#�H�Q���T�e��
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