| /external/kernel-headers/original/asm-x86/ |
| D | ptrace-abi.h | 43 #define RDI 112 macro
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| /external/llvm/test/CodeGen/X86/ |
| D | maskmovdqu.ll | 2 ; RUN: llc < %s -march=x86-64 -mattr=+sse2 | grep -i RDI
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| D | 2010-04-08-CoalescerBug.ll | 5 ; %RDI<def,dead> = MOV64rr %RAX<kill>, %EDI<imp-def>
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| D | ghc-cc64.ll | 11 @r4 = external global i64 ; assigned to register: RDI
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| D | 2010-06-01-DeadArg-DbgInfo.ll | 11 ;CHECK: DEBUG_VALUE: baz:this <- RDI+0
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| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 347 X86::RBX, X86::RBP, X86::RDI, X86::RSI, in getCalleeSavedRegs()
668 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegister()
705 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegister()
741 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegister()
777 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI: in getX86SubSuperRegister()
778 return X86::RDI; in getX86SubSuperRegister()
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| D | X86SelectionDAGInfo.cpp | 134 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI : in EmitTargetCodeForMemset()
224 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI : in EmitTargetCodeForMemcpy()
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| D | X86InstrSystem.td | 411 let Defs = [RAX, RDI], Uses = [RDX, RDI] in
416 let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in {
424 let Defs = [RAX, RSI, RDI], Uses = [RAX, RSI, RDI] in {
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| D | X86RegisterInfo.td | 129 def RDI : RegisterWithSubRegs<"rdi", [EDI]>, DwarfRegNum<[5, -2, -2]>;
313 (add RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
356 def GR64_TC : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RSI, RDI,
387 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)> {
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| D | X86InstrControl.td | 215 let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
279 // AMD64 cc clobbers RSI, RDI, XMM6-XMM15.
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| D | X86CallingConv.td | 148 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
232 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>,
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| D | X86InstrMMX.td | 439 let Uses = [RDI] in
442 [(int_x86_mmx_maskmovq VR64:$src, VR64:$mask, RDI)]>;
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| D | X86InstrCompiler.td | 253 let Defs = [RCX,RDI,RSI], Uses = [RCX,RDI,RSI], isCodeGenOnly = 1 in
269 let Defs = [RCX,RDI], Uses = [RAX,RCX,RDI], isCodeGenOnly = 1 in
295 let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
321 Uses = [RSP, RDI],
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| D | X86MCInstLower.cpp | 544 LEA.addOperand(MCOperand::CreateReg(X86::RDI)); // dest in LowerTlsAddr()
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| D | X86FrameLowering.cpp | 98 X86::RAX, X86::RDX, X86::RCX, X86::RSI, X86::RDI, in findDeadCallerSavedReg()
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| D | X86InstrInfo.td | 782 let Defs = [RCX,RDI], Uses = [RAX,RCX,RDI,EFLAGS] in
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| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 168 ENTRY(RDI) \
186 ENTRY(RDI) \
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| /external/valgrind/main/VEX/auxprogs/ |
| D | genoffsets.c | 104 GENOFFSET(AMD64,amd64,RDI); in foo()
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| /external/valgrind/main/coregrind/m_sigframe/ |
| D | sigframe-amd64-linux.c | 352 SC2(rdi,RDI); in synth_ucontext()
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| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 139 case X86::RDI: case X86::EDI: case X86::DI: case X86::DIL: case X86::BH: in getX86RegNum()
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 365 unsigned basereg = is64BitMode() ? X86::RDI : X86::EDI; in isDstOp()
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| /external/strace/ |
| D | syscall.c | 2089 {RDI,RSI,RDX,R10,R8,R9}, /* x86-64 ABI */
2090 {RBX,RCX,RDX,RSI,RDI,RBP} /* i386 ABI */
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| D | util.c | 1352 # define arg0_offset ((long)(8*(current_personality ? RBX : RDI)))
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| D | process.c | 2625 { 8*RDI, "8*RDI" },
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| /external/valgrind/main/memcheck/ |
| D | mc_machine.c | 477 if (o == GOF(RDI) && is1248) return o; in get_otrack_shadow_offset_wrk()
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