| /external/kernel-headers/original/asm-x86/ |
| D | ptrace-abi.h | 42 #define RSI 104 macro
|
| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 347 X86::RBX, X86::RBP, X86::RDI, X86::RSI, in getCalleeSavedRegs()
666 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegister()
703 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegister()
739 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegister()
775 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI: in getX86SubSuperRegister()
776 return X86::RSI; in getX86SubSuperRegister()
|
| D | X86InstrSystem.td | 416 let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in {
424 let Defs = [RAX, RSI, RDI], Uses = [RAX, RSI, RDI] in {
428 let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
|
| D | X86RegisterInfo.td | 128 def RSI : RegisterWithSubRegs<"rsi", [ESI]>, DwarfRegNum<[4, -2, -2]>;
313 (add RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
356 def GR64_TC : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RSI, RDI,
387 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)> {
|
| D | X86SelectionDAGInfo.cpp | 228 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RSI : in EmitTargetCodeForMemcpy()
|
| D | X86InstrControl.td | 215 let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
279 // AMD64 cc clobbers RSI, RDI, XMM6-XMM15.
|
| D | X86CallingConv.td | 148 CCIfType<[i64], CCAssignToReg<[RDI, RSI, RDX, RCX, R8 , R9 ]>>,
232 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>,
|
| D | X86FrameLowering.cpp | 98 X86::RAX, X86::RDX, X86::RCX, X86::RSI, X86::RDI, in findDeadCallerSavedReg()
|
| D | X86InstrCompiler.td | 253 let Defs = [RCX,RDI,RSI], Uses = [RCX,RDI,RSI], isCodeGenOnly = 1 in
295 let Defs = [RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
|
| D | X86ISelLowering.cpp | 1795 X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9 in LowerFormalArguments()
10732 MI->addRegisterDefined(X86::RSI); in EmitInstrWithCustomInserter()
13131 case X86::SI: DestReg = X86::RSI; break; in getRegForInlineAsmConstraint()
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 167 ENTRY(RSI) \
185 ENTRY(RSI) \
|
| /external/valgrind/main/VEX/auxprogs/ |
| D | genoffsets.c | 103 GENOFFSET(AMD64,amd64,RSI); in foo()
|
| /external/llvm/test/CodeGen/X86/ |
| D | ghc-cc64.ll | 10 @r3 = external global i64 ; assigned to register: RSI
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrFormats.td | 104 class RSI<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
|
| D | SystemZInstrInfo.td | 934 def SRL32rri : RSI<0x88,
944 def SHL32rri : RSI<0x89,
955 def SRA32rri : RSI<0x8A,
|
| /external/valgrind/main/coregrind/m_sigframe/ |
| D | sigframe-amd64-linux.c | 353 SC2(rsi,RSI); in synth_ucontext()
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 137 case X86::RSI: case X86::ESI: case X86::SI: case X86::SIL: case X86::DH: in getX86RegNum()
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86AsmParser.cpp | 355 unsigned basereg = is64BitMode() ? X86::RSI : X86::ESI; in isSrcOp()
|
| /external/strace/ |
| D | syscall.c | 2089 {RDI,RSI,RDX,R10,R8,R9}, /* x86-64 ABI */
2090 {RBX,RCX,RDX,RSI,RDI,RBP} /* i386 ABI */
|
| D | util.c | 1353 # define arg1_offset ((long)(8*(current_personality ? RCX : RSI)))
|
| D | process.c | 2624 { 8*RSI, "8*RSI" },
|
| /external/qemu-pc-bios/bochs/bios/ |
| D | acpi-dsdt.hex | 173 0x52,0x53,0x49,0x20,0x44,0x52,0x53,0x4A, /* 000004F0 "RSI DRSJ" */
|
| /external/valgrind/main/memcheck/ |
| D | mc_machine.c | 476 if (o == GOF(RSI) && is1248) return o; in get_otrack_shadow_offset_wrk()
|
| /external/valgrind/main/exp-ptrcheck/ |
| D | h_main.c | 1411 if (o == GOF(RSI) && is8) goto exactly1; in get_IntRegInfo()
1440 if (o == GOF(RSI) && is421) { o -= 0; goto contains_o; } in get_IntRegInfo()
|