| /external/llvm/lib/Target/ARM/ |
| D | ARMFrameLowering.cpp | 32 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo(); in hasFP() local
41 RegInfo->needsStackRealignment(MF) || in hasFP()
123 const ARMBaseRegisterInfo *RegInfo = in emitPrologue() local
134 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue()
255 if (RegInfo->needsStackRealignment(MF)) { in emitPrologue()
289 if (RegInfo->hasBasePointer(MF)) { in emitPrologue()
292 TII.get(ARM::MOVr), RegInfo->getBaseRegister()) in emitPrologue()
297 RegInfo->getBaseRegister()) in emitPrologue()
317 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo(); in emitEpilogue() local
326 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue()
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| D | Thumb1FrameLowering.cpp | 52 const Thumb1RegisterInfo *RegInfo = in emitPrologue() local
61 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue()
62 unsigned BasePtr = RegInfo->getBaseRegister(); in emitPrologue()
74 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize, in emitPrologue()
79 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes, in emitPrologue()
147 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes, in emitPrologue()
162 if (RegInfo->hasBasePointer(MF)) in emitPrologue()
205 const Thumb1RegisterInfo *RegInfo = in emitEpilogue() local
212 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(); in emitEpilogue()
213 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitEpilogue()
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| /external/llvm/lib/Target/Blackfin/ |
| D | BlackfinFrameLowering.cpp | 47 const BlackfinRegisterInfo *RegInfo = in emitPrologue() local
63 RegInfo->adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, -FrameSize); in emitPrologue()
85 RegInfo->loadConstant(MBB, MBBI, dl, BF::P1, -FrameSize); in emitPrologue()
95 const BlackfinRegisterInfo *RegInfo = in emitEpilogue() local
108 RegInfo->adjustRegister(MBB, MBBI, dl, BF::SP, BF::P1, FrameSize); in emitEpilogue()
120 const BlackfinRegisterInfo *RegInfo = in processFunctionBeforeCalleeSavedScan() local
124 if (RegInfo->requiresRegisterScavenging(MF)) { in processFunctionBeforeCalleeSavedScan()
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| /external/llvm/lib/CodeGen/ |
| D | MachineInstr.cpp | 52 void MachineOperand::AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo) { in AddRegOperandToRegInfo() argument
57 if (RegInfo == 0) { in AddRegOperandToRegInfo()
64 MachineOperand **Head = &RegInfo->getRegUseDefListHead(getReg()); in AddRegOperandToRegInfo()
597 void MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo) { in AddRegOperandsToUseLists() argument
600 Operands[i].AddRegOperandToRegInfo(&RegInfo); in AddRegOperandsToUseLists()
614 MachineRegisterInfo *RegInfo = getRegInfo(); in addOperand() local
629 Operands.back().AddRegOperandToRegInfo(RegInfo); in addOperand()
644 if (RegInfo == 0) { in addOperand()
677 Operands[OpNo].AddRegOperandToRegInfo(RegInfo); in addOperand()
686 Operands[i].AddRegOperandToRegInfo(RegInfo); in addOperand()
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| D | MachineFunction.cpp | 59 RegInfo = new (Allocator) MachineRegisterInfo(*TM.getRegisterInfo()); in MachineFunction()
61 RegInfo = 0; in MachineFunction()
81 if (RegInfo) { in ~MachineFunction()
82 RegInfo->~MachineRegisterInfo(); in ~MachineFunction()
83 Allocator.Deallocate(RegInfo); in ~MachineFunction()
303 if (RegInfo && !RegInfo->livein_empty()) { in print()
306 I = RegInfo->livein_begin(), E = RegInfo->livein_end(); I != E; ++I) { in print()
315 if (RegInfo && !RegInfo->liveout_empty()) { in print()
318 I = RegInfo->liveout_begin(), E = RegInfo->liveout_end(); I != E; ++I) in print()
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| D | PrologEpilogInserter.cpp | 147 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); in calculateCallsInformation() local
194 RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I); in calculateCallsInformation()
202 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); in calculateCalleeSavedRegisters() local
207 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(&Fn); in calculateCalleeSavedRegisters()
228 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); in calculateCalleeSavedRegisters()
250 const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg); in calculateCalleeSavedRegisters()
253 if (RegInfo->hasReservedSpillSlot(Fn, Reg, FrameIdx)) { in calculateCalleeSavedRegisters()
562 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); in calculateFrameObjectOffsets() local
563 if (RS && TFI.hasFP(Fn) && RegInfo->useFPForScavengingIndex(Fn) && in calculateFrameObjectOffsets()
564 !RegInfo->needsStackRealignment(Fn)) { in calculateFrameObjectOffsets()
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| /external/llvm/lib/Target/X86/ |
| D | X86FrameLowering.cpp | 358 const X86RegisterInfo *RegInfo = TM.getRegisterInfo(); in emitPrologue() local
370 unsigned SlotSize = RegInfo->getSlotSize(); in emitPrologue()
371 unsigned FramePtr = RegInfo->getFrameRegister(MF); in emitPrologue()
372 unsigned StackPtr = RegInfo->getStackRegister(); in emitPrologue()
398 !RegInfo->needsStackRealignment(MF) && in emitPrologue()
444 if (RegInfo->needsStackRealignment(MF)) in emitPrologue()
504 if (RegInfo->needsStackRealignment(MF)) { in emitPrologue()
614 TII, *RegInfo); in emitPrologue()
625 TII, *RegInfo); in emitPrologue()
656 const X86RegisterInfo *RegInfo = TM.getRegisterInfo(); in emitEpilogue() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 733 MachineRegisterInfo &RegInfo = MF->getRegInfo(); in EmitAtomicBinary() local
742 unsigned StoreVal = RegInfo.createVirtualRegister(RC); in EmitAtomicBinary()
743 unsigned AndRes = RegInfo.createVirtualRegister(RC); in EmitAtomicBinary()
744 unsigned Success = RegInfo.createVirtualRegister(RC); in EmitAtomicBinary()
806 MachineRegisterInfo &RegInfo = MF->getRegInfo(); in EmitAtomicBinaryPartword() local
815 unsigned AlignedAddr = RegInfo.createVirtualRegister(RC); in EmitAtomicBinaryPartword()
816 unsigned ShiftAmt = RegInfo.createVirtualRegister(RC); in EmitAtomicBinaryPartword()
817 unsigned Mask = RegInfo.createVirtualRegister(RC); in EmitAtomicBinaryPartword()
818 unsigned Mask2 = RegInfo.createVirtualRegister(RC); in EmitAtomicBinaryPartword()
819 unsigned NewVal = RegInfo.createVirtualRegister(RC); in EmitAtomicBinaryPartword()
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| D | MipsFrameLowering.cpp | 142 const MipsRegisterInfo *RegInfo = in emitPrologue() local
170 .addReg(RegInfo->getPICCallReg()); in emitPrologue()
220 const unsigned *SubRegs = RegInfo->getSubRegisters(Reg); in emitPrologue()
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| D | MipsInstrInfo.cpp | 451 MachineRegisterInfo &RegInfo = MF->getRegInfo(); in getGlobalBaseReg() local
454 GlobalBaseReg = RegInfo.createVirtualRegister(Mips::CPURegsRegisterClass); in getGlobalBaseReg()
457 RegInfo.addLiveIn(Mips::GP); in getGlobalBaseReg()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstr.h | 421 const TargetRegisterInfo &RegInfo);
428 const TargetRegisterInfo *RegInfo,
435 bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo,
441 const TargetRegisterInfo *RegInfo = 0);
554 void AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo);
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| D | MachineFunction.h | 82 MachineRegisterInfo *RegInfo;
154 MachineRegisterInfo &getRegInfo() { return *RegInfo; }
155 const MachineRegisterInfo &getRegInfo() const { return *RegInfo; }
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| D | FunctionLoweringInfo.h | 60 MachineRegisterInfo *RegInfo; variable
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| D | SelectionDAGISel.h | 47 MachineRegisterInfo *RegInfo; variable
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| /external/llvm/lib/Target/Alpha/ |
| D | AlphaInstrInfo.cpp | 348 MachineRegisterInfo &RegInfo = MF->getRegInfo(); in getGlobalBaseReg() local
351 GlobalBaseReg = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass); in getGlobalBaseReg()
354 RegInfo.addLiveIn(Alpha::R29); in getGlobalBaseReg()
373 MachineRegisterInfo &RegInfo = MF->getRegInfo(); in getGlobalRetAddr() local
376 GlobalRetAddr = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass); in getGlobalRetAddr()
379 RegInfo.addLiveIn(Alpha::R26); in getGlobalRetAddr()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreFrameLowering.cpp | 95 const XCoreRegisterInfo *RegInfo = in emitPrologue() local
120 bool emitFrameMoves = RegInfo->needsFrameMoves(MF); in emitPrologue()
342 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo(); in processFunctionBeforeCalleeSavedScan() local
361 if (RegInfo->requiresRegisterScavenging(MF)) { in processFunctionBeforeCalleeSavedScan()
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| D | XCoreISelLowering.cpp | 786 const TargetRegisterInfo *RegInfo = getTargetMachine().getRegisterInfo(); in LowerFRAMEADDR() local
788 RegInfo->getFrameRegister(MF), MVT::i32); in LowerFRAMEADDR()
1079 MachineRegisterInfo &RegInfo = MF.getRegInfo(); in LowerCCCArguments() local
1109 unsigned VReg = RegInfo.createVirtualRegister( in LowerCCCArguments()
1111 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCCCArguments()
1160 unsigned VReg = RegInfo.createVirtualRegister( in LowerCCCArguments()
1162 RegInfo.addLiveIn(ArgRegs[i], VReg); in LowerCCCArguments()
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeInstrInfo.cpp | 286 MachineRegisterInfo &RegInfo = MF->getRegInfo(); in getGlobalBaseReg() local
289 GlobalBaseReg = RegInfo.createVirtualRegister(MBlaze::GPRRegisterClass); in getGlobalBaseReg()
292 RegInfo.addLiveIn(MBlaze::R20); in getGlobalBaseReg()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 4652 MachineRegisterInfo &RegInfo = F->getRegInfo(); in EmitAtomicBinary() local
4654 RegInfo.createVirtualRegister( in EmitAtomicBinary()
4721 MachineRegisterInfo &RegInfo = F->getRegInfo(); in EmitPartwordAtomicBinary() local
4725 unsigned PtrReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary()
4726 unsigned Shift1Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary()
4727 unsigned ShiftReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary()
4728 unsigned Incr2Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary()
4729 unsigned MaskReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary()
4730 unsigned Mask2Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary()
4731 unsigned Mask3Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary()
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| D | PPCISelDAGToDAG.cpp | 175 for (unsigned i = 0, e = RegInfo->getNumVirtRegs(); i != e; ++i) { in InsertVRSaveCode()
177 if (RegInfo->getRegClass(Reg) == &PPC::VRRCRegClass) { in InsertVRSaveCode()
196 unsigned InVRSAVE = RegInfo->createVirtualRegister(&PPC::GPRCRegClass); in InsertVRSaveCode()
197 unsigned UpdatedVRSAVE = RegInfo->createVirtualRegister(&PPC::GPRCRegClass); in InsertVRSaveCode()
242 GlobalBaseReg = RegInfo->createVirtualRegister(PPC::GPRCRegisterClass); in getGlobalBaseReg()
246 GlobalBaseReg = RegInfo->createVirtualRegister(PPC::G8RCRegisterClass); in getGlobalBaseReg()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.cpp | 336 MachineRegisterInfo &RegInfo = MF->getRegInfo(); in getGlobalBaseReg() local
338 GlobalBaseReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); in getGlobalBaseReg()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 141 const SystemZRegisterInfo *RegInfo; variable
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| D | SystemZISelLowering.cpp | 46 RegInfo = TM.getRegisterInfo(); in SystemZTargetLowering()
292 MachineRegisterInfo &RegInfo = MF.getRegInfo(); in LowerCCCArguments() local
329 unsigned VReg = RegInfo.createVirtualRegister(RC); in LowerCCCArguments()
330 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCCCArguments()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGISel.cpp | 264 RegInfo = &MF->getRegInfo(); in runOnMachineFunction()
288 RegInfo->EmitLiveInCopies(EntryMBB, TRI, TII); in runOnMachineFunction()
292 for (MachineRegisterInfo::livein_iterator LI = RegInfo->livein_begin(), in runOnMachineFunction()
293 E = RegInfo->livein_end(); LI != E; ++LI) in runOnMachineFunction()
304 MachineInstr *Def = RegInfo->getVRegDef(Reg); in runOnMachineFunction()
313 MachineInstr *Def = RegInfo->getVRegDef(LDI->second); in runOnMachineFunction()
329 UI = RegInfo->use_begin(LDI->second); in runOnMachineFunction()
770 MachineRegisterInfo::reg_iterator RI = RegInfo->reg_begin(LoadReg); in TryToFoldFastISelLoad()
771 if (RI == RegInfo->reg_end()) in TryToFoldFastISelLoad()
779 if (PostRI != RegInfo->reg_end()) in TryToFoldFastISelLoad()
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| D | FunctionLoweringInfo.cpp | 64 RegInfo = &MF->getRegInfo(); in set()
209 return RegInfo->createVirtualRegister(TLI.getRegClassFor(VT)); in CreateReg()
|