/external/clang/test/CodeGenCXX/ |
D | warn-padded-packed.cpp | 70 struct S13 { // expected-warning {{padding size of 'S13' with 6 bits to alignment boundary}} struct 76 void f(S1*, S2*, S3*, S4*, S5*, S6*, S7*, S8*, S9*, S10*, S11*, S12*, S13*) { } in f() argument
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/external/dropbear/libtomcrypt/src/hashes/ |
D | md4.c | 40 #define S13 11 macro 98 FF (c, d, a, b, x[ 2], S13); /* 3 */ in _md4_compress() 102 FF (c, d, a, b, x[ 6], S13); /* 7 */ in _md4_compress() 106 FF (c, d, a, b, x[10], S13); /* 11 */ in _md4_compress() 110 FF (c, d, a, b, x[14], S13); /* 15 */ in _md4_compress()
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/external/quake/quake/src/QW/client/ |
D | md4.c | 80 #define S13 11 macro 198 FF (c, d, a, b, x[ 2], S13); /* 3 */ in MD4Transform() 202 FF (c, d, a, b, x[ 6], S13); /* 7 */ in MD4Transform() 206 FF (c, d, a, b, x[10], S13); /* 11 */ in MD4Transform() 210 FF (c, d, a, b, x[14], S13); /* 15 */ in MD4Transform()
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/external/bouncycastle/src/main/java/org/bouncycastle/crypto/digests/ |
D | MD5Digest.java | 129 private static final int S13 = 17; field in MD5Digest 213 c = rotateLeft(c + F(d, a, b) + X[ 2] + 0x242070db, S13) + d; in processBlock() 217 c = rotateLeft(c + F(d, a, b) + X[ 6] + 0xa8304613, S13) + d; in processBlock() 221 c = rotateLeft(c + F(d, a, b) + X[10] + 0xffff5bb1, S13) + d; in processBlock() 225 c = rotateLeft(c + F(d, a, b) + X[14] + 0xa679438e, S13) + d; in processBlock()
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/external/ppp/pppd/ |
D | md5.c | 212 #define S13 17 macro 216 FF ( c, d, a, b, in[ 2], S13, UL( 606105819)); /* 3 */ 220 FF ( c, d, a, b, in[ 6], S13, UL(2821735955)); /* 7 */ 224 FF ( c, d, a, b, in[10], S13, UL(4294925233)); /* 11 */ 228 FF ( c, d, a, b, in[14], S13, UL(2792965006)); /* 15 */
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/external/llvm/lib/Target/ARM/ |
D | ARMCallingConv.td | 69 S9, S10, S11, S12, S13, S14, S15]>>, 81 S9, S10, S11, S12, S13, S14, S15]>>, 150 S9, S10, S11, S12, S13, S14, S15]>>, 162 S9, S10, S11, S12, S13, S14, S15]>>,
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D | ARMBaseInfo.h | 171 case SP: case S13: case D13: case Q13: return 13; in getARMRegisterNumbering()
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D | ARMRegisterInfo.td | 80 def S12 : ARMFReg<12, "s12">; def S13 : ARMFReg<13, "s13">; 99 def D6 : ARMReg< 6, "d6", [S12, S13]>, DwarfRegNum<[262]>;
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D | ARMBaseRegisterInfo.cpp | 702 case ARM::S13: in getRegisterPairEven() 793 return ARM::S13; in getRegisterPairOdd()
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/external/v8/test/sputnik/ |
D | sputnik.status | 133 S13.2_D1.2: PASS || FAIL_OK
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/external/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassemblerCore.cpp | 249 case ARM::SPRRegClassID: case ARM::SPR_8RegClassID: return ARM::S13; in getRegisterEnum()
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/external/webkit/PerformanceTests/Parser/resources/ |
D | final-url-en | 62957 http://www.parl.gc.ca/common/Bills_ls.asp?Parl=37&Ses=1&ls=S13
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