| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 300 SCALAR_TO_VECTOR, enumerator
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 791 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i8, Expand); in X86TargetLowering()
792 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i16, Expand); in X86TargetLowering()
793 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2i32, Expand); in X86TargetLowering()
794 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v1i64, Expand); in X86TargetLowering()
854 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Custom); in X86TargetLowering()
855 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i16, Custom); in X86TargetLowering()
1027 setOperationAction(ISD::SCALAR_TO_VECTOR, SVT, Custom); in X86TargetLowering()
1407 ValToCopy = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, in LowerReturn()
2080 Arg = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2i64, Arg); in LowerCall()
3734 if (N->getOpcode() != ISD::SCALAR_TO_VECTOR) in isScalarLoadToVector()
[all …]
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| D | X86ISelDAGToDAG.cpp | 1177 if (N.getOpcode() == ISD::SCALAR_TO_VECTOR) { in SelectScalarSSELoad()
1194 N.getOperand(0).getOpcode() == ISD::SCALAR_TO_VECTOR && in SelectScalarSSELoad()
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| /external/llvm/lib/Target/PowerPC/ |
| D | README_ALTIVEC.txt | 61 We currently codegen SCALAR_TO_VECTOR as a store of the scalar to a 16-byte
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| D | PPCISelLowering.cpp | 331 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Expand); in PPCTargetLowering()
359 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom); in PPCTargetLowering()
360 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Custom); in PPCTargetLowering()
4520 case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG); in LowerOperation()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 58 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break; in ScalarizeVectorResult()
429 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break; in SplitVectorResult()
698 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0)); in SplitVecRes_SCALAR_TO_VECTOR()
1216 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break; in WidenVectorResult()
1882 return DAG.getNode(ISD::SCALAR_TO_VECTOR, N->getDebugLoc(), in WidenVecRes_SCALAR_TO_VECTOR()
2208 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]); in BuildVectorFromScalar()
2262 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp); in GenWidenVectorLoads()
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| D | LegalizeDAG.cpp | 693 SDValue ScVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, in ExpandINSERT_VECTOR_ELT()
2086 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Node->getOperand(0)); in ExpandBUILD_VECTOR()
2131 SDValue Vec1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value1); in ExpandBUILD_VECTOR()
2134 Vec2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value2); in ExpandBUILD_VECTOR()
3160 case ISD::SCALAR_TO_VECTOR: in ExpandNode()
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| D | LegalizeIntegerTypes.cpp | 85 case ISD::SCALAR_TO_VECTOR: in PromoteIntegerResult()
722 case ISD::SCALAR_TO_VECTOR: in PromoteIntegerOperand()
2353 case ISD::SCALAR_TO_VECTOR: Res = ExpandOp_SCALAR_TO_VECTOR(N); break; in ExpandIntegerOperand()
2829 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NOutVT, Op); in PromoteIntRes_SCALAR_TO_VECTOR()
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| D | DAGCombiner.cpp | 5120 if (BV->getOpcode() == ISD::SCALAR_TO_VECTOR) in ConstantFoldBITCASTofBUILD_VECTOR()
5121 return DAG.getNode(ISD::SCALAR_TO_VECTOR, BV->getDebugLoc(), VT, in ConstantFoldBITCASTofBUILD_VECTOR()
5220 return DAG.getNode(ISD::SCALAR_TO_VECTOR, BV->getDebugLoc(), VT, in ConstantFoldBITCASTofBUILD_VECTOR()
6822 if (InVec.getOpcode() == ISD::SCALAR_TO_VECTOR) { in visitEXTRACT_VECTOR_ELT()
6867 } else if (InVec.getOpcode() == ISD::SCALAR_TO_VECTOR && in visitEXTRACT_VECTOR_ELT()
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| D | SelectionDAG.cpp | 193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) in isScalarToVector()
2563 case ISD::SCALAR_TO_VECTOR: in getNode()
5907 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; in getOperationName()
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 427 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom); in SPUTargetLowering()
436 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom); in SPUTargetLowering()
880 SDValue vectorizeOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, vecVT, in LowerSTORE()
2179 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, ValOp), in LowerINSERT_VECTOR_ELT()
2824 case ISD::SCALAR_TO_VECTOR: in LowerOperation()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 436 def scalar_to_vector : SDNode<"ISD::SCALAR_TO_VECTOR", SDTypeProfile<1, 1, []>,
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3065 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
3067 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); in LowerFCOPYSIGN()
3946 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value); in LowerBUILD_VECTOR()
4302 if (Lane == 0 && V1.getOpcode() == ISD::SCALAR_TO_VECTOR) { in LowerVECTOR_SHUFFLE()
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