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Searched refs:ShAmt (Results 1 – 25 of 25) sorted by relevance

/external/clang/lib/Lex/
DPPExpressions.cpp555 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); in EvaluateDirectiveSubExpr() local
557 Overflow = ShAmt >= LHS.Val.getBitWidth(); in EvaluateDirectiveSubExpr()
559 ShAmt = LHS.Val.getBitWidth()-1; in EvaluateDirectiveSubExpr()
560 Res = LHS.Val << ShAmt; in EvaluateDirectiveSubExpr()
562 Res = llvm::APSInt(LHS.Val.sshl_ov(ShAmt, Overflow), false); in EvaluateDirectiveSubExpr()
568 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); in EvaluateDirectiveSubExpr() local
569 if (ShAmt >= LHS.getBitWidth()) in EvaluateDirectiveSubExpr()
570 Overflow = true, ShAmt = LHS.getBitWidth()-1; in EvaluateDirectiveSubExpr()
571 Res = LHS.Val >> ShAmt; in EvaluateDirectiveSubExpr()
/external/llvm/lib/Transforms/InstCombine/
DInstCombineShifts.cpp360 Constant *ShAmt = ConstantExpr::getZExt(Op1, TrOp->getType()); in FoldShiftByConstant() local
362 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName()); in FoldShiftByConstant()
630 unsigned ShAmt = Op1C->getZExtValue(); in visitShl() local
635 APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt))) { in visitShl()
642 ComputeNumSignBits(I.getOperand(0)) > ShAmt) { in visitShl()
669 unsigned ShAmt = Op1C->getZExtValue(); in visitLShr() local
679 isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) { in visitLShr()
689 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ in visitLShr()
709 unsigned ShAmt = Op1C->getZExtValue(); in visitAShr() local
735 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ in visitAShr()
DInstCombineCompares.cpp902 ConstantInt *ShAmt) { in FoldICmpShrCst() argument
909 uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits); in FoldICmpShrCst()
1122 ConstantInt *ShAmt; in visitICmpInstWithInstAndIntCst() local
1123 ShAmt = Shift ? dyn_cast<ConstantInt>(Shift->getOperand(1)) : 0; in visitICmpInstWithInstAndIntCst()
1130 if (ShAmt) { in visitICmpInstWithInstAndIntCst()
1136 int ShAmtVal = TyBits - ShAmt->getLimitedValue(TyBits); in visitICmpInstWithInstAndIntCst()
1147 NewCst = ConstantExpr::getLShr(RHS, ShAmt); in visitICmpInstWithInstAndIntCst()
1149 NewCst = ConstantExpr::getShl(RHS, ShAmt); in visitICmpInstWithInstAndIntCst()
1154 NewCst, ShAmt) != RHS) { in visitICmpInstWithInstAndIntCst()
1168 NewAndCST = ConstantExpr::getLShr(AndCST, ShAmt); in visitICmpInstWithInstAndIntCst()
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DInstCombineCasts.cpp1089 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); in visitSExt() local
1090 return BinaryOperator::CreateAShr(Builder->CreateShl(Res, ShAmt, "sext"), in visitSExt()
1091 ShAmt); in visitSExt()
1102 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); in visitSExt() local
1103 Value *Res = Builder->CreateShl(TI->getOperand(0), ShAmt, "sext"); in visitSExt()
1104 return BinaryOperator::CreateAShr(Res, ShAmt); in visitSExt()
1131 unsigned ShAmt = CA->getZExtValue()+SrcDstSize-MidSize; in visitSExt() local
1132 Constant *ShAmtV = ConstantInt::get(CI.getType(), ShAmt); in visitSExt()
1627 ConstantInt *ShAmt = 0; in OptimizeIntToFloatBitCast() local
1629 m_ConstantInt(ShAmt)))) && in OptimizeIntToFloatBitCast()
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DInstCombineAddSub.cpp135 Constant *ShAmt = ConstantInt::get(I.getType(), ExtendAmt); in visitAdd() local
136 Value *NewShl = Builder->CreateShl(XorLHS, ShAmt, "sext"); in visitAdd()
137 return BinaryOperator::CreateAShr(NewShl, ShAmt); in visitAdd()
DInstCombineMulDivRem.cpp522 Value *ShAmt = llvm::ConstantInt::get(RHS->getType(), in visitSDiv() local
524 return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName()); in visitSDiv()
DInstCombineAndOrXor.cpp1310 unsigned ShAmt = in CollectBSwapParts() local
1313 if ((ShAmt & 7) || (ShAmt > 8*ByteValues.size())) in CollectBSwapParts()
1316 unsigned ByteShift = ShAmt >> 3; in CollectBSwapParts()
DInstructionCombining.cpp947 ConstantInt *ShAmt = cast<ConstantInt>(Inst->getOperand(1)); in visitGetElementPtrInst() local
948 uint32_t ShAmtVal = ShAmt->getLimitedValue(64); in visitGetElementPtrInst()
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp1435 unsigned ShAmt = SA->getZExtValue(); in SimplifyDemandedBits() local
1439 if (ShAmt >= BitWidth) in SimplifyDemandedBits()
1447 if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) { in SimplifyDemandedBits()
1450 int Diff = ShAmt-C1; in SimplifyDemandedBits()
1464 if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), in SimplifyDemandedBits()
1478 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) in SimplifyDemandedBits()
1482 TLO.DAG.getConstant(ShAmt, ShTy)); in SimplifyDemandedBits()
1499 unsigned ShAmt = SA->getZExtValue(); in SimplifyDemandedBits() local
1504 if (ShAmt >= BitWidth) in SimplifyDemandedBits()
1512 if (ShAmt && (NewMask & APInt::getHighBitsSet(VTSize, ShAmt)) == 0) { in SimplifyDemandedBits()
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DDAGCombiner.cpp2722 SDValue ShAmt = DAG.getConstant(16, getShiftAmountTy(VT)); in MatchBSwapHWord() local
2724 return DAG.getNode(ISD::ROTL, N->getDebugLoc(), VT, BSwap, ShAmt); in MatchBSwapHWord()
2726 return DAG.getNode(ISD::ROTR, N->getDebugLoc(), VT, BSwap, ShAmt); in MatchBSwapHWord()
2728 DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, BSwap, ShAmt), in MatchBSwapHWord()
2729 DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, BSwap, ShAmt)); in MatchBSwapHWord()
3576 uint64_t ShAmt = N1C->getZExtValue()+64-N0.getValueSizeInBits(); in visitSRL() local
3578 DAG.getConstant(~0ULL >> ShAmt, VT)); in visitSRL()
3628 unsigned ShAmt = UnknownBits.countTrailingZeros(); in visitSRL() local
3631 if (ShAmt) { in visitSRL()
3633 DAG.getConstant(ShAmt, getShiftAmountTy(Op.getValueType()))); in visitSRL()
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DSelectionDAG.cpp1728 unsigned ShAmt = SA->getZExtValue(); in ComputeMaskedBits() local
1731 if (ShAmt >= BitWidth) in ComputeMaskedBits()
1734 ComputeMaskedBits(Op.getOperand(0), Mask.lshr(ShAmt), in ComputeMaskedBits()
1737 KnownZero <<= ShAmt; in ComputeMaskedBits()
1738 KnownOne <<= ShAmt; in ComputeMaskedBits()
1740 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); in ComputeMaskedBits()
1746 unsigned ShAmt = SA->getZExtValue(); in ComputeMaskedBits() local
1749 if (ShAmt >= BitWidth) in ComputeMaskedBits()
1752 ComputeMaskedBits(Op.getOperand(0), (Mask << ShAmt), in ComputeMaskedBits()
1755 KnownZero = KnownZero.lshr(ShAmt); in ComputeMaskedBits()
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DSelectionDAGBuilder.cpp4541 SDValue ShAmt = getValue(I.getArgOperand(1)); in visitIntrinsicCall() local
4542 if (isa<ConstantSDNode>(ShAmt)) { in visitIntrinsicCall()
4582 ShOps[0] = ShAmt; in visitIntrinsicCall()
4584 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, dl, ShAmtVT, &ShOps[0], 2); in visitIntrinsicCall()
4586 ShAmt = DAG.getNode(ISD::BITCAST, dl, DestVT, ShAmt); in visitIntrinsicCall()
4589 getValue(I.getArgOperand(0)), ShAmt); in visitIntrinsicCall()
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp92 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt);
359 unsigned ShAmt) { in isShifterOpProfitable() argument
365 return ShOpcVal == ARM_AM::lsl && ShAmt == 2; in isShifterOpProfitable()
462 unsigned ShAmt = Log2_32(RHSC); in SelectLdStSOReg() local
464 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectLdStSOReg()
493 unsigned ShAmt = 0; in SelectLdStSOReg() local
503 ShAmt = Sh->getZExtValue(); in SelectLdStSOReg()
504 if (isShifterOpProfitable(Offset, ShOpcVal, ShAmt)) in SelectLdStSOReg()
507 ShAmt = 0; in SelectLdStSOReg()
524 ShAmt = Sh->getZExtValue(); in SelectLdStSOReg()
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DARMBaseInstrInfo.cpp2216 unsigned ShAmt = DefMI->getOperand(3).getImm(); in getOperandLatency() local
2217 if (ShAmt == 0 || ShAmt == 2) in getOperandLatency()
2376 unsigned ShAmt = in getOperandLatency() local
2378 if (ShAmt == 0 || ShAmt == 2) in getOperandLatency()
DARMISelLowering.cpp3226 SDValue ShAmt = Op.getOperand(2); in LowerShiftRightParts() local
3233 DAG.getConstant(VTBits, MVT::i32), ShAmt); in LowerShiftRightParts()
3234 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts()
3235 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts()
3244 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
3262 SDValue ShAmt = Op.getOperand(2); in LowerShiftLeftParts() local
3267 DAG.getConstant(VTBits, MVT::i32), ShAmt); in LowerShiftLeftParts()
3269 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftLeftParts()
3271 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts()
3278 SDValue Lo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerShiftLeftParts()
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/external/llvm/lib/Transforms/Scalar/
DScalarReplAggregates.cpp868 int ShAmt = 0; in ConvertScalar_ExtractValue() local
873 ShAmt = TD.getTypeStoreSizeInBits(NTy) - in ConvertScalar_ExtractValue()
876 ShAmt = Offset; in ConvertScalar_ExtractValue()
882 if (ShAmt > 0 && (unsigned)ShAmt < NTy->getBitWidth()) in ConvertScalar_ExtractValue()
885 ShAmt), "tmp"); in ConvertScalar_ExtractValue()
886 else if (ShAmt < 0 && (unsigned)-ShAmt < NTy->getBitWidth()) in ConvertScalar_ExtractValue()
889 -ShAmt), "tmp"); in ConvertScalar_ExtractValue()
1033 int ShAmt = 0; in ConvertScalar_InsertValue() local
1038 ShAmt = DestStoreWidth - SrcStoreWidth - Offset; in ConvertScalar_InsertValue()
1040 ShAmt = Offset; in ConvertScalar_InsertValue()
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/external/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp746 unsigned ShAmt = MO3.getImm(); in printT2AddrModeSoRegOperand() local
747 if (ShAmt) { in printT2AddrModeSoRegOperand()
748 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!"); in printT2AddrModeSoRegOperand()
749 O << ", lsl #" << ShAmt; in printT2AddrModeSoRegOperand()
/external/llvm/lib/VMCore/
DConstantFold.cpp254 unsigned ShAmt = Amt->getZExtValue(); in ExtractConstantBytes() local
256 if ((ShAmt & 7) != 0) in ExtractConstantBytes()
258 ShAmt >>= 3; in ExtractConstantBytes()
261 if (ByteStart >= CSize-ShAmt) in ExtractConstantBytes()
265 if (ByteStart+ByteSize+ShAmt <= CSize) in ExtractConstantBytes()
266 return ExtractConstantBytes(CE->getOperand(0), ByteStart+ShAmt, ByteSize); in ExtractConstantBytes()
276 unsigned ShAmt = Amt->getZExtValue(); in ExtractConstantBytes() local
278 if ((ShAmt & 7) != 0) in ExtractConstantBytes()
280 ShAmt >>= 3; in ExtractConstantBytes()
283 if (ByteStart+ByteSize <= ShAmt) in ExtractConstantBytes()
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/external/llvm/lib/Target/X86/
DX86InstrInfo.cpp1174 unsigned ShAmt = MI->getOperand(2).getImm(); in convertToThreeAddressWithLEA() local
1175 MIB.addReg(0).addImm(1 << ShAmt) in convertToThreeAddressWithLEA()
1288 unsigned ShAmt = MI->getOperand(2).getImm(); in convertToThreeAddress() local
1289 if (ShAmt == 0 || ShAmt >= 4) return 0; in convertToThreeAddress()
1298 .addReg(0).addImm(1 << ShAmt) in convertToThreeAddress()
1307 unsigned ShAmt = MI->getOperand(2).getImm(); in convertToThreeAddress() local
1308 if (ShAmt == 0 || ShAmt >= 4) return 0; in convertToThreeAddress()
1318 .addReg(0).addImm(1 << ShAmt) in convertToThreeAddress()
1326 unsigned ShAmt = MI->getOperand(2).getImm(); in convertToThreeAddress() local
1327 if (ShAmt == 0 || ShAmt >= 4) return 0; in convertToThreeAddress()
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DX86ISelLowering.cpp4141 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { in isVectorShiftRight() argument
4166 ShAmt = NumZeros; in isVectorShiftRight()
4174 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { in isVectorShiftLeft() argument
4199 ShAmt = NumZeros; in isVectorShiftLeft()
4207 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { in isVectorShift() argument
4208 if (isVectorShiftLeft(SVOp, DAG, isLeft, ShVal, ShAmt) || in isVectorShift()
4209 isVectorShiftRight(SVOp, DAG, isLeft, ShVal, ShAmt)) in isVectorShift()
5809 unsigned ShAmt = 0; in LowerVECTOR_SHUFFLE() local
5812 isVectorShift(SVOp, DAG, isLeft, ShVal, ShAmt); in LowerVECTOR_SHUFFLE()
5817 ShAmt *= EltVT.getSizeInBits(); in LowerVECTOR_SHUFFLE()
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/external/llvm/lib/Target/ARM/Disassembler/
DThumbDisassemblerCore.h1504 unsigned ShAmt = decodeImmShift(bits2, imm5, ShOp); in DisassembleThumb2DPSoReg() local
1505 MI.addOperand(MCOperand::CreateImm(ARM_AM::getSORegOpc(ShOp, ShAmt))); in DisassembleThumb2DPSoReg()
1612 unsigned ShAmt = slice(insn, 14, 12) << 2 | slice(insn, 7, 6); in DisassembleThumb2Sat() local
1613 if (ShAmt == 0) { in DisassembleThumb2Sat()
1615 ShAmt = 32; in DisassembleThumb2Sat()
1619 MI.addOperand(MCOperand::CreateImm(ARM_AM::getSORegOpc(Opc, ShAmt))); in DisassembleThumb2Sat()
DARMDisassemblerCore.cpp1676 unsigned ShAmt = slice(insn, 11, 7); in DisassembleSatFrm() local
1677 if (ShAmt == 0) { in DisassembleSatFrm()
1680 ShAmt = 32; in DisassembleSatFrm()
1684 MI.addOperand(MCOperand::CreateImm(ARM_AM::getSORegOpc(Opc, ShAmt))); in DisassembleSatFrm()
/external/llvm/lib/Target/Alpha/
DAlphaISelLowering.cpp587 SDValue ShAmt = Op.getOperand(2); in LowerOperation() local
589 DAG.getConstant(64, MVT::i64), ShAmt); in LowerOperation()
599 SDValue Hi_Pos = DAG.getNode(ISD::SRL, dl, MVT::i64, ShOpHi, ShAmt); in LowerOperation()
600 SDValue Lo_Pos = DAG.getNode(ISD::SRL, dl, MVT::i64, ShOpLo, ShAmt); in LowerOperation()
/external/llvm/lib/Support/
DAPInt.cpp2099 APInt APInt::sshl_ov(unsigned ShAmt, bool &Overflow) const { in sshl_ov() argument
2100 Overflow = ShAmt >= getBitWidth(); in sshl_ov()
2102 ShAmt = getBitWidth()-1; in sshl_ov()
2105 Overflow = ShAmt >= countLeadingZeros(); in sshl_ov()
2107 Overflow = ShAmt >= countLeadingOnes(); in sshl_ov()
2109 return *this << ShAmt; in sshl_ov()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp757 int ShAmt = (4-ByteSize)*8; in get_VSPLTI_elt() local
758 int MaskVal = ((int)Value << ShAmt) >> ShAmt; in get_VSPLTI_elt()