| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetMachine.cpp | 69 Subtarget(TT, CPU, FS), in ARMBaseTargetMachine()
71 InstrItins(Subtarget.getInstrItineraryData()) { in ARMBaseTargetMachine()
80 : ARMBaseTargetMachine(T, TT, CPU, FS, RM), InstrInfo(Subtarget), in ARMTargetMachine()
81 DataLayout(Subtarget.isAPCS_ABI() ? in ARMTargetMachine()
89 FrameLowering(Subtarget) { in ARMTargetMachine()
90 if (!Subtarget.hasARMOps()) in ARMTargetMachine()
91 report_fatal_error("CPU: '" + Subtarget.getCPUString() + "' does not " in ARMTargetMachine()
99 InstrInfo(Subtarget.hasThumb2() in ThumbTargetMachine()
100 ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget)) in ThumbTargetMachine()
101 : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))), in ThumbTargetMachine()
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| D | ARMAsmPrinter.h | 37 const ARMSubtarget *Subtarget; variable
50 Subtarget = &TM.getSubtarget<ARMSubtarget>(); in ARMAsmPrinter()
106 if (!Subtarget->isTargetDarwin()) in getISAEncoding()
108 return Subtarget->isThumb() ? in getISAEncoding()
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| D | ARMTargetMachine.h | 36 ARMSubtarget Subtarget;
46 virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; } in getSubtargetImpl()
92 return Subtarget.isTargetELF() ? &ELFWriterInfo : 0; in getELFWriterInfo()
136 return Subtarget.isTargetELF() ? &ELFWriterInfo : 0; in getELFWriterInfo()
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| D | ARMISelLowering.cpp | 177 Subtarget = &TM.getSubtarget<ARMSubtarget>(); in ARMTargetLowering()
181 if (Subtarget->isTargetDarwin()) { in ARMTargetLowering()
183 if (Subtarget->isThumb() && Subtarget->hasVFP2()) { in ARMTargetLowering()
263 if (Subtarget->isAAPCS_ABI()) { in ARMTargetLowering()
422 if (Subtarget->isThumb1Only()) in ARMTargetLowering()
426 if (!UseSoftFloat && Subtarget->hasVFP2() && !Subtarget->isThumb1Only()) { in ARMTargetLowering()
428 if (!Subtarget->isFPOnlySP()) in ARMTargetLowering()
434 if (Subtarget->hasNEON()) { in ARMTargetLowering()
523 if (!Subtarget->isThumb1Only()) { in ARMTargetLowering()
540 if (Subtarget->isThumb1Only()) { in ARMTargetLowering()
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| D | ARMISelDAGToDAG.cpp | 67 const ARMSubtarget *Subtarget; member in __anon88768f220111::ARMDAGToDAGISel
74 Subtarget(&TM.getSubtarget<ARMSubtarget>()) { in ARMDAGToDAGISel()
322 if (!Subtarget->isCortexA8() && !Subtarget->isCortexA9()) in hasNoVMLxHazardUse()
360 if (!Subtarget->isCortexA9()) in isShifterOpProfitable()
414 !(Subtarget->useMovt() && in SelectAddrModeImm12()
450 (!Subtarget->isCortexA9() || N.hasOneUse())) { in SelectLdStSOReg()
486 if (Subtarget->isCortexA9() && !N.hasOneUse()) in SelectLdStSOReg()
517 !(Subtarget->isCortexA9() || N.getOperand(0).hasOneUse())) { in SelectLdStSOReg()
525 if (!Subtarget->isCortexA9() || in SelectLdStSOReg()
555 (!Subtarget->isCortexA9() || N.hasOneUse())) { in SelectAddrMode2Worker()
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| /external/llvm/lib/Target/X86/ |
| D | X86TargetMachine.cpp | 102 Subtarget(TT, CPU, FS, StackAlignmentOverride, is64Bit), in X86TargetMachine()
103 FrameLowering(*this, Subtarget), in X86TargetMachine()
108 Subtarget.setPICStyle(PICStyles::None); in X86TargetMachine()
109 } else if (Subtarget.is64Bit()) { in X86TargetMachine()
111 Subtarget.setPICStyle(PICStyles::RIPRel); in X86TargetMachine()
112 } else if (Subtarget.isTargetCygMing()) { in X86TargetMachine()
113 Subtarget.setPICStyle(PICStyles::None); in X86TargetMachine()
114 } else if (Subtarget.isTargetDarwin()) { in X86TargetMachine()
116 Subtarget.setPICStyle(PICStyles::StubPIC); in X86TargetMachine()
119 Subtarget.setPICStyle(PICStyles::StubDynamicNoPIC); in X86TargetMachine()
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| D | X86FastISel.cpp | 45 const X86Subtarget *Subtarget; member in __anon8a56aea10111::X86FastISel
60 Subtarget = &TM.getSubtarget<X86Subtarget>(); in X86FastISel()
61 StackPtr = Subtarget->is64Bit() ? X86::RSP : X86::ESP; in X86FastISel()
62 X86ScalarSSEf64 = Subtarget->hasSSE2(); in X86FastISel()
63 X86ScalarSSEf32 = Subtarget->hasSSE1(); in X86FastISel()
201 if (Subtarget->hasSSE1()) { in X86FastEmitLoad()
210 if (Subtarget->hasSSE2()) { in X86FastEmitLoad()
253 Opc = Subtarget->hasSSE1() ? X86::MOVSSmr : X86::ST_Fp32m; in X86FastEmitStore()
256 Opc = Subtarget->hasSSE2() ? X86::MOVSDmr : X86::ST_Fp64m; in X86FastEmitStore()
432 (!AM.GV || !Subtarget->isPICStyleRIPRel()) && in X86SelectAddress()
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| D | X86SelectionDAGInfo.cpp | 22 Subtarget(&TM.getSubtarget<X86Subtarget>()), in X86SelectionDAGInfo()
48 Subtarget->getMaxInlineSizeThreshold()) { in EmitTargetCodeForMemset()
55 V->isNullValue() ? Subtarget->getBZeroEntry() : 0) { in EmitTargetCodeForMemset()
101 if (Subtarget->is64Bit() && ((Align & 0x7) == 0)) { // QWORD aligned in EmitTargetCodeForMemset()
130 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX : in EmitTargetCodeForMemset()
134 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI : in EmitTargetCodeForMemset()
187 if (!AlwaysInline && SizeVal > Subtarget->getMaxInlineSizeThreshold()) in EmitTargetCodeForMemcpy()
212 AVT = Subtarget->is64Bit() ? MVT::i64 : MVT::i32; in EmitTargetCodeForMemcpy()
220 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RCX : in EmitTargetCodeForMemcpy()
224 Chain = DAG.getCopyToReg(Chain, dl, Subtarget->is64Bit() ? X86::RDI : in EmitTargetCodeForMemcpy()
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| D | X86AsmPrinter.cpp | 56 if (Subtarget->isTargetCOFF() && !Subtarget->isTargetEnvMacho()) { in runOnMachineFunction()
390 if (Subtarget->isPICStyleRIPRel()) in PrintAsmOperand()
477 if (Subtarget->isTargetEnvMacho()) in EmitStartOfAsmFile()
483 if (Subtarget->isTargetEnvMacho()) { in EmitEndOfAsmFile()
577 if (Subtarget->isTargetWindows() && !Subtarget->isTargetCygMing() && in EmitEndOfAsmFile()
579 StringRef SymbolName = Subtarget->is64Bit() ? "_fltused" : "__fltused"; in EmitEndOfAsmFile()
584 if (Subtarget->isTargetCOFF() && !Subtarget->isTargetEnvMacho()) { in EmitEndOfAsmFile()
620 if (Subtarget->isTargetWindows()) in EmitEndOfAsmFile()
625 if (Subtarget->isTargetWindows()) in EmitEndOfAsmFile()
633 if (Subtarget->isTargetWindows()) in EmitEndOfAsmFile()
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| D | X86AsmPrinter.h | 35 const X86Subtarget *Subtarget; variable
39 Subtarget = &TM.getSubtarget<X86Subtarget>(); in X86AsmPrinter()
46 const X86Subtarget &getSubtarget() const { return *Subtarget; } in getSubtarget()
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| D | X86ISelLowering.cpp | 191 const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>(); in createTLOF() local
192 bool is64Bit = Subtarget->is64Bit(); in createTLOF()
194 if (Subtarget->isTargetEnvMacho()) { in createTLOF()
200 if (Subtarget->isTargetELF()) { in createTLOF()
205 if (Subtarget->isTargetCOFF() && !Subtarget->isTargetEnvMacho()) in createTLOF()
212 Subtarget = &TM.getSubtarget<X86Subtarget>(); in X86TargetLowering()
213 X86ScalarSSEf64 = Subtarget->hasXMMInt(); in X86TargetLowering()
214 X86ScalarSSEf32 = Subtarget->hasXMM(); in X86TargetLowering()
215 X86StackPtr = Subtarget->is64Bit() ? X86::RSP : X86::ESP; in X86TargetLowering()
228 if (Subtarget->is64Bit()) in X86TargetLowering()
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| D | X86TargetMachine.h | 35 X86Subtarget Subtarget; variable
58 virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; } in getSubtargetImpl()
69 return Subtarget.isTargetELF() ? &ELFWriterInfo : 0; in getELFWriterInfo()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTargetMachine.cpp | 59 Subtarget(TT, CPU, FS, is64Bit), in PPCTargetMachine()
60 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this), in PPCTargetMachine()
61 FrameLowering(Subtarget), JITInfo(*this, is64Bit), in PPCTargetMachine()
63 InstrItins(Subtarget.getInstrItineraryData()) { in PPCTargetMachine()
106 if (Subtarget.isPPC64()) in addCodeEmitter()
113 Subtarget.SetJITMode(); in addCodeEmitter()
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| D | PPCFrameLowering.h | 26 const PPCSubtarget &Subtarget; variable
31 Subtarget(sti) { in PPCFrameLowering()
115 if (Subtarget.isDarwinABI()) { in getCalleeSavedSpillSlots()
117 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
127 if (!Subtarget.isSVR4ABI()) { in getCalleeSavedSpillSlots()
307 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
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| D | PPCRegisterInfo.cpp | 66 return ((EnablePPC32RS && !Subtarget.isPPC64()) || in requiresRegisterScavenging()
67 (EnablePPC64RS && Subtarget.isPPC64())); in requiresRegisterScavenging()
118 Subtarget(ST), TII(tii) { in PPCRegisterInfo()
140 if (Subtarget.isPPC64()) in getPointerRegClass()
256 if (Subtarget.isDarwinABI()) in getCalleeSavedRegs()
257 return Subtarget.isPPC64() ? Darwin64_CalleeSavedRegs : in getCalleeSavedRegs()
260 return Subtarget.isPPC64() ? SVR4_64_CalleeSavedRegs : SVR4_CalleeSavedRegs; in getCalleeSavedRegs()
275 if (Subtarget.isSVR4ABI()) { in getReservedRegs()
282 if (Subtarget.isDarwinABI()) { in getReservedRegs()
289 if (Subtarget.isPPC64()) { in getReservedRegs()
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| D | PPCAsmPrinter.cpp | 62 const PPCSubtarget &Subtarget; member in __anon74c3f0e20111::PPCAsmPrinter
67 Subtarget(TM.getSubtarget<PPCSubtarget>()), TOCLabelID(0) {} in PPCAsmPrinter()
153 if (!Subtarget.isDarwin()) RegName = stripRegisterPrefix(RegName); in printOperand()
347 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, Subtarget.isDarwin()); in EmitInstruction()
379 LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, Subtarget.isDarwin()); in EmitInstruction()
384 if (!Subtarget.isPPC64()) // linux/ppc32 - Normal entry label. in EmitFunctionEntryLabel()
433 unsigned Directive = Subtarget.getDarwinDirective(); in EmitStartOfAsmFile()
434 if (Subtarget.isGigaProcessor() && Directive < PPC::DIR_970) in EmitStartOfAsmFile()
436 if (Subtarget.hasAltivec() && Directive < PPC::DIR_7400) in EmitStartOfAsmFile()
438 if (Subtarget.isPPC64() && Directive < PPC::DIR_970) in EmitStartOfAsmFile()
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| /external/llvm/lib/Target/CellSPU/ |
| D | SPUTargetMachine.cpp | 37 Subtarget(TT, CPU, FS), in SPUTargetMachine()
38 DataLayout(Subtarget.getTargetDataString()), in SPUTargetMachine()
40 FrameLowering(Subtarget), in SPUTargetMachine()
43 InstrItins(Subtarget.getInstrItineraryData()) { in SPUTargetMachine()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcTargetMachine.cpp | 31 Subtarget(TT, CPU, FS, is64bit), in SparcTargetMachine()
32 DataLayout(Subtarget.getDataLayout()), in SparcTargetMachine()
33 TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget), in SparcTargetMachine()
34 FrameLowering(Subtarget) { in SparcTargetMachine()
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| /external/llvm/lib/Target/Blackfin/ |
| D | BlackfinTargetMachine.cpp | 30 Subtarget(TT, CPU, FS), in BlackfinTargetMachine()
33 InstrInfo(Subtarget), in BlackfinTargetMachine()
34 FrameLowering(Subtarget) { in BlackfinTargetMachine()
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| /external/llvm/lib/Target/MBlaze/ |
| D | MBlazeTargetMachine.cpp | 73 Subtarget(TT, CPU, FS), in MBlazeTargetMachine()
76 FrameLowering(Subtarget), in MBlazeTargetMachine()
78 InstrItins(Subtarget.getInstrItineraryData()) { in MBlazeTargetMachine()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreTargetMachine.cpp | 26 Subtarget(TT, CPU, FS), in XCoreTargetMachine()
30 FrameLowering(Subtarget), in XCoreTargetMachine()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZTargetMachine.cpp | 28 Subtarget(TT, CPU, FS), in SystemZTargetMachine()
32 FrameLowering(Subtarget) { in SystemZTargetMachine()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430TargetMachine.cpp | 32 Subtarget(TT, CPU, FS), in MSP430TargetMachine()
36 FrameLowering(Subtarget) { } in MSP430TargetMachine()
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| /external/llvm/lib/Target/Alpha/ |
| D | AlphaTargetMachine.cpp | 30 FrameLowering(Subtarget), in AlphaTargetMachine()
31 Subtarget(TT, CPU, FS), in AlphaTargetMachine()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsRegisterInfo.h | 29 const MipsSubtarget &Subtarget; member
32 MipsRegisterInfo(const MipsSubtarget &Subtarget, const TargetInstrInfo &tii);
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