Searched refs:Tmp5 (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| D | IntrinsicLowering.cpp | 210 Value *Tmp5 = Builder.CreateShl(V, ConstantInt::get(V->getType(), 8), in LowerBSWAP() local
231 Tmp5 = Builder.CreateAnd(Tmp5, in LowerBSWAP()
248 Tmp6 = Builder.CreateOr(Tmp6, Tmp5, "bswap.or2"); in LowerBSWAP()
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| /external/clang/lib/CodeGen/ |
| D | CGExprComplex.cpp | 532 llvm::Value *Tmp5 = Builder.CreateFMul(RHSi, RHSi, "tmp"); // d*d in EmitBinDiv() local
533 llvm::Value *Tmp6 = Builder.CreateFAdd(Tmp4, Tmp5, "tmp"); // cc+dd in EmitBinDiv()
548 llvm::Value *Tmp5 = Builder.CreateMul(RHSi, RHSi, "tmp"); // d*d in EmitBinDiv() local
549 llvm::Value *Tmp6 = Builder.CreateAdd(Tmp4, Tmp5, "tmp"); // cc+dd in EmitBinDiv()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 3790 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSHL_PARTS() local
3792 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5); in LowerSHL_PARTS()
3819 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRL_PARTS() local
3821 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5); in LowerSRL_PARTS()
3847 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSRA_PARTS() local
3849 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5); in LowerSRA_PARTS()
3851 SDValue OutLo = DAG.getSelectCC(dl, Tmp5, DAG.getConstant(0, AmtVT), in LowerSRA_PARTS()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2690 SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; in ExpandBSWAP() local
2711 Tmp5 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(8, SHVT)); in ExpandBSWAP()
2718 Tmp5 = DAG.getNode(ISD::AND, dl, VT, Tmp5, DAG.getConstant(255ULL<<32, VT)); in ExpandBSWAP()
2723 Tmp6 = DAG.getNode(ISD::OR, dl, VT, Tmp6, Tmp5); in ExpandBSWAP()
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