Home
last modified time | relevance | path

Searched refs:VCGE (Results 1 – 8 of 8) sorted by relevance

/external/llvm/test/CodeGen/ARM/
Dvfcmp.ll28 ; ole is implemented with VCGE
63 ; ugt is implemented with VCGE/VMVN
75 ; ult is implemented with VCGE/VMVN
114 ; uno is implemented with VCGT/VCGE/VORR/VMVN
128 ; ord is implemented with VCGT/VCGE/VORR
Dvicmp.ll6 ; to VCGT and VCGE. Test all the operand types for not-equal but only sample
/external/llvm/lib/Target/ARM/
DARMISelLowering.h94 VCGE, // Vector compare greater than or equal. enumerator
DARMISelLowering.cpp862 case ARMISD::VCGE: return "ARMISD::VCGE"; in getTargetNodeName()
3416 case ISD::SETGE: Opc = ARMISD::VCGE; break; in LowerVSETCC()
3420 case ISD::SETULT: Invert = true; Opc = ARMISD::VCGE; break; in LowerVSETCC()
3437 Op1 = DAG.getNode(ARMISD::VCGE, dl, VT, TmpOp0, TmpOp1); in LowerVSETCC()
3449 case ISD::SETGE: Opc = ARMISD::VCGE; break; in LowerVSETCC()
3487 if (Opc == ARMISD::VCGE) in LowerVSETCC()
3499 case ARMISD::VCGE: in LowerVSETCC()
DARMInstrNEON.td23 def NEONvcge : SDNode<"ARMISD::VCGE", SDTARMVCMP>;
3579 // VCGE : Vector Compare Greater Than or Equal
/external/clang/include/clang/Basic/
Darm_neon.td162 def VCGE : Inst<"vcge", "udd", "csifUcUsUiQcQsQiQfQUcQUsQUi", OP_GE>;
/external/valgrind/main/none/tests/arm/
Dneon128.stdout.exp383 ---- VCGE ----
1840 ---- VCGE #0 ----
3822 ---- VCGE (fp) ----
4085 ---- VCGE (fp) #0 ----
Dneon64.stdout.exp531 ---- VCGE ----
3084 ---- VCGE #0 ----
5729 ---- VCGE (fp) ----
6188 ---- VCGE (fp) #0 ----