/external/llvm/test/CodeGen/Thumb2/ |
D | thumb2-cmn.ll | 12 ; CHECK: cmn.w r0, r1 20 ; CHECK: cmn.w r0, r1 28 ; CHECK: cmn.w r0, r1 36 ; CHECK: cmn.w r0, r1 45 ; CHECK: cmn.w r0, r1, lsl #5 54 ; CHECK: cmn.w r0, r1, lsr #6 63 ; CHECK: cmn.w r0, r1, asr #7 74 ; CHECK: cmn.w r0, r0, ror #8
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D | thumb2-cmn2.ll | 6 ; CHECK: cmn.w {{r.*}}, #187 14 ; CHECK: cmn.w {{r.*}}, #11141290 22 ; CHECK: cmn.w {{r.*}}, #-872363008 30 ; CHECK: cmn.w {{r.*}}, #1114112
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/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 396 cmn r1, #0xf 397 cmn r1, r6 398 cmn r1, r6, lsl #10 399 cmn r1, r6, lsr #10 400 cmn sp, r6, lsr #10 401 cmn r1, r6, asr #10 402 cmn r1, r6, ror #10 403 cmn r7, r8, lsl r2 404 cmn sp, r8, lsr r2 405 cmn r7, r8, asr r2 [all …]
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/external/srec/srec/clib/ |
D | swicms.c | 170 swicms->cmn [i] = gswicms_cmn1_8 [i]; in swicms_init() 181 swicms->cmn [i] = gswicms_cmn1_11 [i]; in swicms_init() 211 &swicms->cmn[0], MAX_CHAN_DIM); in swicms_init() 216 rc = GetSomeIntsIfAny( L("CREC.Frontend.swicms.cmn8"), &swicms->cmn[0], MAX_CHAN_DIM); in swicms_init() 223 rc = GetSomeIntsIfAny( L("CREC.Frontend.swicms.cmn11"), &swicms->cmn[0], MAX_CHAN_DIM); in swicms_init() 301 temp [dim_count] = swicms->cmn [dim_count]; in swicms_get_cmn() 434 swicms->cmn [dim_count] = temp_cmn [dim_count]; in swicms_set_cmn() 647 for (i = 0; i < MAX_CHAN_DIM; i++) swicms->lda_cmn[i] = swicms->cmn[i]; in swicms_lda_process() 664 printf_vector("swicms->cmn ", " %d", swicms->cmn, MAX_CHAN_DIM); in swicms_lda_process()
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/external/v8/test/cctest/ |
D | test-disasm-arm.cc | 206 COMPARE(cmn(r0, Operand(r4)), in TEST() 208 COMPARE(cmn(r1, Operand(r6, ROR, 1)), in TEST() 210 COMPARE(cmn(r2, Operand(r8)), in TEST() 212 COMPARE(cmn(r3, Operand(fp), le), in TEST() 314 COMPARE(cmn(r3, Operand(-1024)), in TEST()
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/external/srec/srec/include/ |
D | swicms.h | 50 imeldata cmn [MAX_CHAN_DIM]; /* channel mean */ member
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb-tests.txt | 27 # CHECK: cmn.w r0, #31
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D | arm-tests.txt | 30 # CHECK: cmn r0, #1
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/external/valgrind/main/coregrind/ |
D | m_trampoline.S | 575 cmn r2, #1 607 cmn r2, #1
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/external/v8/src/arm/ |
D | regexp-macro-assembler-arm.cc | 302 __ cmn(r1, Operand(current_input_offset())); in CheckNotBackReferenceIgnoreCase() local 403 __ cmn(r1, Operand(current_input_offset())); in CheckNotBackReference() local
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D | assembler-arm.h | 801 void cmn(Register src1, const Operand& src2, Condition cond = al);
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D | assembler-arm.cc | 1142 void Assembler::cmn(Register src1, const Operand& src2, Condition cond) { in cmn() function in v8::internal::Assembler
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/external/openssl/crypto/sha/asm/ |
D | sha1-armv4-large.s | 182 cmn sp,#0 @ [+3], clear carry to denote 20_39
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb.td | 936 // "cmn", "\t$lhs, $rhs", 942 "cmn", "\t$Rn, $Rm",
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D | README.txt | 457 cmn r0, r1
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D | ARMInstrInfo.td | 3192 // cmn r0, r1 3221 //defm CMN : AI1_cmp_irs<0b1011, "cmn", 3232 defm CMNz : AI1_cmp_irs<0b1011, "cmn",
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D | ARMInstrThumb2.td | 2687 //defm t2CMN : T2I_cmp_irs<0b1000, "cmn", 2689 defm t2CMNz : T2I_cmp_irs<0b1000, "cmn",
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/external/webkit/Source/JavaScriptCore/assembler/ |
D | MacroAssemblerARMv7.h | 842 m_assembler.cmn(left, armImm); in compare32()
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D | ARMv7Assembler.h | 924 void cmn(RegisterID rn, ARMThumbImmediate imm) in cmn() function
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/external/valgrind/main/none/tests/arm/ |
D | v6intThumb.stdout.exp | 31 cmn r3, r6 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, c:v-in 0, cpsr 0x40000000 Z 32 cmn r3, r6 :: rd 0x00000000 rm 0x00000001, rn 0x00000000, c:v-in 0, cpsr 0x00000000 33 cmn r3, r6 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, c:v-in 0, cpsr 0x00000000 34 cmn r3, r6 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, c:v-in 0, cpsr 0x80000000 N 35 cmn r3, r6 :: rd 0xffffffff rm 0x00000000, rn 0xffffffff, c:v-in 0, cpsr 0x80000000 N 36 cmn r3, r6 :: rd 0x80000000 rm 0x00000000, rn 0x80000000, c:v-in 0, cpsr 0x80000000 N 37 cmn r3, r6 :: rd 0x00000000 rm 0x80000000, rn 0x00000000, c:v-in 0, cpsr 0x80000000 N 38 cmn r3, r6 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, c:v-in 0, cpsr 0x40000000 Z 39 cmn r3, r6 :: rd 0x00000000 rm 0x00000001, rn 0x00000000, c:v-in 0, cpsr 0x00000000 40 cmn r3, r6 :: rd 0x00000001 rm 0x00000000, rn 0x00000001, c:v-in 0, cpsr 0x00000000 [all …]
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/external/webkit/Source/JavaScriptCore/ |
D | ChangeLog-2011-02-16 | 11016 Add cmn to branch32(reg, imm) on ARM 11019 The conditional comparison can be done with cmn if the imm value is 11020 negative and can fit into the cmn instruction.
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/external/webkit/PerformanceTests/Parser/resources/ |
D | final-url-en | 33028 http://www.cmn.hs.h.kyoto-u.ac.jp/CMN7/lambert.html 33029 http://www.cmn.ie/cmnsitenew/trackark/tol_html/vaa.html
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