Searched refs:imm1 (Results 1 – 7 of 7) sorted by relevance
| /external/webkit/Source/JavaScriptCore/assembler/ |
| D | ARMAssembler.cpp | 95 ARMWord imm1; in genInt() local
132 imm1 = OP2_IMM | ((imm >> 16) & 0xff) | (((rol + 4) & 0xf) << 8); in genInt()
135 imm1 = OP2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8); in genInt()
169 imm1 = OP2_IMM | ((imm >> 24) & 0xff) | ((rol & 0xf) << 8); in genInt()
190 mov_r(reg, imm1); in genInt()
193 mvn_r(reg, imm1); in genInt()
|
| /external/webkit/Source/JavaScriptCore/dfg/ |
| D | DFGNode.h | 199 …Node(NodeType op, ExceptionInfo exceptionInfo, OpInfo imm1, OpInfo imm2, NodeIndex child1 = NoNode…
207 , m_opInfo(imm1.m_value) in op()
|
| D | DFGSpeculativeJIT.cpp | 368 int32_t imm1; in compile() local
369 if (isDoubleConstantWithInt32Value(node.child1, imm1)) { in compile()
374 …speculationCheck(m_jit.branchAdd32(MacroAssembler::Overflow, reg, Imm32(imm1), result.registerID()… in compile()
|
| /external/valgrind/main/coregrind/ |
| D | launcher-aix5.c | 434 UInt imm1, UInt imm2, UInt opc2 ) in mkFormMD() argument
440 assert(imm1 < 0x40); in mkFormMD()
445 ((imm1 & 0x1F)<<11) | (imm2<<5) | in mkFormMD()
446 (opc2<<2) | ((imm1 >> 5)<<1)); in mkFormMD()
|
| /external/valgrind/main/VEX/priv/ |
| D | host_ppc_defs.c | 2260 UInt imm1, UInt imm2, UInt opc2 ) in mkFormMD() argument
2266 vassert(imm1 < 0x40); in mkFormMD()
2271 ((imm1 & 0x1F)<<11) | (imm2<<5) | in mkFormMD()
2272 (opc2<<2) | ((imm1 >> 5)<<1)); in mkFormMD()
|
| D | guest_arm_toIR.c | 2540 UInt imm1, UInt imm3, UInt imm8 ) in thumbExpandImm() argument
2542 vassert(imm1 < (1<<1)); in thumbExpandImm()
2545 UInt i_imm3_a = (imm1 << 4) | (imm3 << 1) | ((imm8 >> 7) & 1); in thumbExpandImm()
2577 UInt imm1 = SLICE_UInt(i0,10,10); in thumbExpandImm_from_I0_I1() local
2580 return thumbExpandImm(updatesC, imm1, imm3, imm8); in thumbExpandImm_from_I0_I1()
16039 UInt imm1 = INSN0(10,10); in disInstr_THUMB_WRK() local
16042 UInt imm12 = (imm1 << 11) | (imm3 << 8) | imm8; in disInstr_THUMB_WRK()
|
| /external/llvm/lib/Target/X86/ |
| D | README-SSE.txt | 502 INSERTPS can match any insert (extract, imm1), imm2 for 4 x float, and insert
|