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Searched refs:imm12 (Results 1 – 10 of 10) sorted by relevance

/external/llvm/lib/Target/ARM/Disassembler/
DThumbDisassemblerCore.h244 static inline unsigned ThumbExpandImm(unsigned imm12) { in ThumbExpandImm() argument
245 assert(imm12 <= 0xFFF && "Invalid imm12 argument"); in ThumbExpandImm()
254 if (slice(imm12, 11, 10) == 0) { in ThumbExpandImm()
255 unsigned short control = slice(imm12, 9, 8); in ThumbExpandImm()
256 unsigned imm8 = slice(imm12, 7, 0); in ThumbExpandImm()
272 unsigned Val = 1 << 7 | slice(imm12, 6, 0); in ThumbExpandImm()
273 unsigned Amt = slice(imm12, 11, 7); in ThumbExpandImm()
1571 unsigned imm12 = getIImm3Imm8(insn); in DisassembleThumb2DPModImm() local
1572 MI.addOperand(MCOperand::CreateImm(ThumbExpandImm(imm12))); in DisassembleThumb2DPModImm()
/external/qemu/
Darm-dis.c3359 unsigned int imm12 = 0; in print_insn_thumb32() local
3360 imm12 |= (given & 0x000000ffu); in print_insn_thumb32()
3361 imm12 |= (given & 0x00007000u) >> 4; in print_insn_thumb32()
3362 imm12 |= (given & 0x04000000u) >> 15; in print_insn_thumb32()
3363 func (stream, "#%u\t; 0x%x", imm12, imm12); in print_insn_thumb32()
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td551 // addrmode_imm12 := reg +/- imm12
573 // addrmode2 := reg +/- imm12
1076 let Inst{11-0} = addr{11-0}; // imm12
1106 let Inst{11-0} = addr{11-0}; // imm12
1265 let Inst{11-0} = addr{11-0}; // imm12
1710 let Inst{11-0} = addr{11-0}; // imm12
1741 // {13} 1 == Rm, 0 == imm12
1743 // {11-0} imm12/Rm
1755 // {13} 1 == Rm, 0 == imm12
1757 // {11-0} imm12/Rm
[all …]
DARMInstrFormats.td528 // {13} 1 == Rm, 0 == imm12
530 // {11-0} imm12/Rm
547 // {13} 1 == Rm, 0 == imm12
549 // {11-0} imm12/Rm
DARMInstrThumb2.td98 // t2addrmode_imm12 := reg + imm12
107 // t2ldrlabel := imm12
836 /// T2I_ld - Defines a set of (op r, {imm12|imm8|so_reg}) load patterns.
919 /// T2I_st - Defines a set of (op r, {imm12|imm8|so_reg}) store patterns.
1463 let Inst{11-0} = addr{11-0}; // imm12
DREADME.txt510 LDR into imm12 and so_reg forms. This allows us to clean up some code. e.g.
/external/valgrind/main/VEX/priv/
Dguest_arm_toIR.c2340 IRExpr* mk_EA_reg_plusminus_imm12 ( UInt rN, UInt bU, UInt imm12, in mk_EA_reg_plusminus_imm12() argument
2345 vassert(imm12 < 0x1000); in mk_EA_reg_plusminus_imm12()
2347 DIS(buf, "[r%u, #%c%u]", rN, opChar, imm12); in mk_EA_reg_plusminus_imm12()
2351 mkU32(imm12) ); in mk_EA_reg_plusminus_imm12()
11875 UInt imm12 = INSN(11,0); in decode_NV_instruction() local
11877 DIP("pld [r%u, #%c%u]\n", rN, bU ? '+' : '-', imm12); in decode_NV_instruction()
11908 UInt imm12 = INSN(11,0); in decode_NV_instruction() local
11910 DIP("pli [r%u, #%c%u]\n", rN, bU ? '+' : '-', imm12); in decode_NV_instruction()
12486 UInt imm12 = (insn >> 0) & 0xFFF; /* 11:0 */ in disInstr_ARM_WRK() local
12527 eaE = mk_EA_reg_plusminus_imm12( rN, bU, imm12, dis_buf ); in disInstr_ARM_WRK()
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.td173 // FIXME: Provide imm12 variant
/external/valgrind/main/none/tests/arm/
Dv6intARM.stdout.exp737 pld reg +/- imm12 cases
/external/webkit/Source/JavaScriptCore/
DChangeLog-2011-02-1623700 imm12 immediate constant in load16. If it is not fit in the instruction