imull (reference) in projects: external

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Searched refs:imull (Results 1 – 25 of 32) sorted by relevance

/external/llvm/test/CodeGen/X86/
D	divide-by-constant.ll	`10 ; CHECK: imull $63551, %eax, %eax 21 ; CHECK: imull $43691, %eax, %eax 33 ; CHECK-NEXT: imull $171, %eax, %eax 43 ; CHECK: imull $1986, %eax, % 59 ; CHECK: imull $26215, %eax, %eax`
D	sdiv-exact.ll	`7 ; CHECK: imull $-1030792151, 4(%esp) 16 ; CHECK-NEXT: imull $-1431655765`
D	2010-09-01-RemoveCopyByCommutingDef.ll	`13 ; The imull clobbers a 32-bit register. 14 ; CHECK: imull %{{...}}, %e[[CLOBBER:..]]`
D	memset-2.ll	`28 ; CHECK: imull $16843009 36 ; CHECK: imull $16843009`
D	machine-cse.ll	`61 ; CHECK: imull 63 ; CHECK-NOT: imull`
D	smul-with-overflow.ll	`21 ; CHECK: imull 40 ; CHECK: imull`
D	subreg-to-reg-3.ll	`1 ; RUN: llc < %s -march=x86-64 \| grep imull`
/external/quake/quake/src/WinQuake/
D	d_draw.s	`299 imull %edx,%eax // (tfrac >> 16) * cachewidth 373 imull %ebx,%eax 568 imull reciprocal_table-8(,%ecx,4) // sstep = (snext - s) / (spancount-1) 572 imull reciprocal_table-8(,%ecx,4) // tstep = (tnext - t) / (spancount-1) 585 imull %ebx,%edx 819 imull C(d_zrowbytes),%ecx 934 imull C(d_zrowbytes),%ecx`
D	snd_mixa.s	`168 imull %esi,%eax 188 imull %esi,%edx`
D	d_spr8.s	`201 imull C(d_zrowbytes) 327 imull C(cachewidth),%eax // (tfrac >> 16) * cachewidth 397 imull %ebx,%eax // (tstep >> 16) * cachewidth; 655 imull reciprocal_table-8(,%ecx,4) // sstep = (snext - s) / (spancount-1) 659 imull reciprocal_table-8(,%ecx,4) // tstep = (tnext - t) / (spancount-1) 673 imull %ebx,%edx // (tstep >> 16) * cachewidth;`
D	d_draw16.s	`303 imull %edx,%eax // (tfrac >> 16) * cachewidth 376 imull %ebx,%eax 627 imull reciprocal_table_16-8(,%ecx,4) // sstep = (snext - s) / 632 imull reciprocal_table_16-8(,%ecx,4) // tstep = (tnext - t) / 645 imull %ebx,%edx`
D	d_polysa.s	`465 imull skinwidth(%esp) 1607 imull %esi,%eax 1612 imull %esi,%edi`
D	d_parta.s	`179 imull C(d_zrowbytes),%edx // point to the z pixel`
/external/quake/quake/src/QW/client/
D	d_draw.s	`299 imull %edx,%eax // (tfrac >> 16) * cachewidth 373 imull %ebx,%eax 568 imull reciprocal_table-8(,%ecx,4) // sstep = (snext - s) / (spancount-1) 572 imull reciprocal_table-8(,%ecx,4) // tstep = (tnext - t) / (spancount-1) 585 imull %ebx,%edx 819 imull C(d_zrowbytes),%ecx 934 imull C(d_zrowbytes),%ecx`
D	snd_mixa.s	`168 imull %esi,%eax 188 imull %esi,%edx`
D	d_spr8.s	`201 imull C(d_zrowbytes) 327 imull C(cachewidth),%eax // (tfrac >> 16) * cachewidth 397 imull %ebx,%eax // (tstep >> 16) * cachewidth; 655 imull reciprocal_table-8(,%ecx,4) // sstep = (snext - s) / (spancount-1) 659 imull reciprocal_table-8(,%ecx,4) // tstep = (tnext - t) / (spancount-1) 673 imull %ebx,%edx // (tstep >> 16) * cachewidth;`
D	d_draw16.s	`303 imull %edx,%eax // (tfrac >> 16) * cachewidth 376 imull %ebx,%eax 627 imull reciprocal_table_16-8(,%ecx,4) // sstep = (snext - s) / 632 imull reciprocal_table_16-8(,%ecx,4) // tstep = (tnext - t) / 645 imull %ebx,%edx`
D	d_polysa.s	`465 imull skinwidth(%esp) 1607 imull %esi,%eax 1612 imull %esi,%edi`
D	d_parta.s	`179 imull C(d_zrowbytes),%edx // point to the z pixel`
/external/llvm/lib/Target/X86/
D	README-X86-64.txt	`94 imull $78, %edi, %eax 101 imull $45, %edi, %eax`
D	README-SSE.txt	`161 imull %ebp, %edi #69.49 650 imull LCPI1_0+12, %eax 654 imull LCPI1_0+4, %eax 658 imull LCPI1_0, %eax 662 imull LCPI1_0+8, %eax`
D	README.txt	`288 imull $3, 4(%esp), %eax 290 Perhaps this is what we really should generate is? Is imull three or four 302 However, if we care more about code size, then imull is better. It's two bytes 1004 imull 12(%esp), %esi 1006 imull 20(%esp), %ecx 1016 imull 12(%esp), %ecx 1018 imull 4(%esp), %eax 1464 imull (%edi,%ecx,4) 1477 imull %esi, %ebp 1482 imull %ecx, %ebx`
/external/valgrind/main/none/tests/x86/
D	insn_basic.def	445 imull eax.sd[-12345678] : r32.sd[12345678] => edx.sd[-35488] eax.sd[-260846532] 446 imull eax.sd[12345678] : m32.sd[-12345678] => edx.sd[-35488] eax.sd[-260846532] 455 imull imm8[123] r32.ud[67890] => 1.ud[8350470] 456 imull imm8[123] r32.ud[67890] r32.ud[0] => 2.ud[8350470] 457 imull imm8[123] m32.ud[67890] r32.ud[0] => 2.ud[8350470] 458 imull imm32[12345] r32.ud[67890] => 1.ud[838102050] 459 imull imm32[12345] r32.ud[67890] r32.ud[0] => 2.ud[838102050] 460 imull imm32[12345] m32.ud[67890] r32.ud[0] => 2.ud[838102050] 461 imull r32.ud[12345] r32.ud[67890] => 1.ud[838102050] 462 imull m32.ud[12345] r32.ud[67890] => 1.ud[838102050]
/external/v8/src/x64/
D	assembler-x64.h	`919 void imull(Register dst, Register src); // dst = dst * src. 920 void imull(Register dst, const Operand& src); // dst = dst * src. 921 void imull(Register dst, Register src, Immediate imm); // dst = src * imm.`
/external/valgrind/main/none/tests/amd64/
D	insn_basic.def	584 imull eax.sd[-12345678] : r32.sd[12345678] => edx.sd[-35488] eax.sd[-260846532] 585 imull eax.sd[12345678] : m32.sd[-12345678] => edx.sd[-35488] eax.sd[-260846532] 596 imull imm8[123] r32.ud[67890] => 1.ud[8350470] 597 imull imm8[123] r32.ud[67890] r32.ud[0] => 2.ud[8350470] 598 imull imm8[123] m32.ud[67890] r32.ud[0] => 2.ud[8350470] 599 imull imm32[12345] r32.ud[67890] => 1.ud[838102050] 600 imull imm32[12345] r32.ud[67890] r32.ud[0] => 2.ud[838102050] 601 imull imm32[12345] m32.ud[67890] r32.ud[0] => 2.ud[838102050] 602 imull r32.ud[12345] r32.ud[67890] => 1.ud[838102050] 603 imull m32.ud[12345] r32.ud[67890] => 1.ud[838102050]