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Searched refs:mmx (Results 1 – 25 of 66) sorted by relevance

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/external/llvm/test/CodeGen/X86/
D	mmx-arith.ll	1 ; RUN: llc < %s -march=x86 -mattr=+mmx 16 …%tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.b( x86_mmx %tmp4a, x86_mmx %tmp7 ) ; <x86_mmx> [#u… 19 …%tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.b( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> [… 28 …%tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.b( x86_mmx %tmp28a, x86_mmx %tmp31 ) ; <x86_mmx> [… 31 …%tmp45 = tail call x86_mmx @llvm.x86.mmx.psubus.b( x86_mmx %tmp36, x86_mmx %tmp40 ) ; <x86_mmx> [… 55 tail call void @llvm.x86.mmx.emms( ) 97 tail call void @llvm.x86.mmx.emms( ) 111 …%tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.w( x86_mmx %tmp4a, x86_mmx %tmp7 ) ; <x86_mmx> [#u… 114 …%tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp12, x86_mmx %tmp16 ) ; <x86_mmx> [… 123 …%tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.w( x86_mmx %tmp28a, x86_mmx %tmp31 ) ; <x86_mmx> [… [all …]
D	mmx-shift.ll	1 ; RUN: llc < %s -march=x86 -mattr=+mmx \| grep psllq \| grep 32 2 ; RUN: llc < %s -march=x86-64 -mattr=+mmx \| grep psllq \| grep 32 3 ; RUN: llc < %s -march=x86 -mattr=+mmx \| grep psrad 4 ; RUN: llc < %s -march=x86-64 -mattr=+mmx \| grep psrlw 9 %tmp6 = tail call x86_mmx @llvm.x86.mmx.pslli.q( x86_mmx %tmp, i32 32 ) ; <x86_mmx> [#uses=1] 14 declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32) nounwind readnone 18 …%tmp7 = tail call x86_mmx @llvm.x86.mmx.psra.d( x86_mmx %mm1, x86_mmx %mm2 ) nounwind readnone ;… 23 declare x86_mmx @llvm.x86.mmx.psra.d(x86_mmx, x86_mmx) nounwind readnone 27 …%tmp8 = tail call x86_mmx @llvm.x86.mmx.psrli.w( x86_mmx %mm1, i32 %bits ) nounwind readnone ; <… 32 declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32) nounwind readnone
D	mmx-bitcast-to-i64.ll	5 %u = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %t, x86_mmx %t) 11 %u = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %t, x86_mmx %t) 17 %u = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %t, x86_mmx %t) 23 %u = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %t, x86_mmx %t) 28 declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx) 29 declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx) 30 declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx) 31 declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx)
D	mmx-builtins.ll	1 ; RUN: llc < %s -march=x86 -mattr=+mmx,+ssse3 \| FileCheck %s 19 declare x86_mmx @llvm.x86.mmx.pcmpgt.d(x86_mmx, x86_mmx) nounwind readnone 28 %2 = tail call x86_mmx @llvm.x86.mmx.pcmpgt.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind 35 declare x86_mmx @llvm.x86.mmx.pcmpgt.w(x86_mmx, x86_mmx) nounwind readnone 44 %2 = tail call x86_mmx @llvm.x86.mmx.pcmpgt.w(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind 51 declare x86_mmx @llvm.x86.mmx.pcmpgt.b(x86_mmx, x86_mmx) nounwind readnone 60 %2 = tail call x86_mmx @llvm.x86.mmx.pcmpgt.b(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind 67 declare x86_mmx @llvm.x86.mmx.pcmpeq.d(x86_mmx, x86_mmx) nounwind readnone 76 %2 = tail call x86_mmx @llvm.x86.mmx.pcmpeq.d(x86_mmx %mmx_var.i, x86_mmx %mmx_var1.i) nounwind 83 declare x86_mmx @llvm.x86.mmx.pcmpeq.w(x86_mmx, x86_mmx) nounwind readnone [all …]
D	2007-06-15-IntToMMX.ll	`1 ; RUN: llc < %s -march=x86-64 -mattr=+mmx \| grep paddusw 8 …%tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp2, x86_mmx %tmp3 ) ; <x86_mmx> [#u… 10 tail call void @llvm.x86.mmx.emms( ) 14 declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx) 16 declare void @llvm.x86.mmx.emms()`
D	mmx-punpckhdq.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse42 -mtriple=x86_64-apple-darwin10 \| FileCheck %s 13 tail call void @llvm.x86.mmx.emms( ) 24 %tmp9 = tail call x86_mmx @llvm.x86.mmx.punpckhdq (x86_mmx %tmp2, x86_mmx %tmp2) 26 tail call void @llvm.x86.mmx.emms( ) 30 declare x86_mmx @llvm.x86.mmx.punpckhdq(x86_mmx, x86_mmx) 31 declare void @llvm.x86.mmx.emms()`
D	2007-07-03-GR64ToVR64.ll	`1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx \| FileCheck %s 13 …%tmp7 = tail call x86_mmx @llvm.x86.mmx.paddus.w( x86_mmx %tmp6, x86_mmx %tmp4 ) ; <x86_mmx> [#us… 15 tail call void @llvm.x86.mmx.emms( ) 19 declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx) 20 declare void @llvm.x86.mmx.emms()`
D	2010-04-23-mmx-movdq2q.ll	1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 \| FileCheck %s 53 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %tmp1, x86_mmx %tmp2) 64 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %tmp1, x86_mmx %tmp2) 75 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %tmp1, x86_mmx %tmp2) 86 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %tmp1, x86_mmx %tmp2) 91 declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx) 92 declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx) 93 declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx) 94 declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx)
D	mmx-arg-passing.ll	`1 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx \| grep mm0 \| count 1 2 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx \| grep esp \| count 2 3 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 \| grep xmm0 4 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 \| grep rdi 5 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 \| not grep movups`
D	mmx-vzmovl-2.ll	`1 ; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 \| grep pxor 2 ; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 \| grep punpckldq 7 declare x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx, i32) nounwind readnone 19 …%3 = call x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx %0, i32 32) nounwind readnone ; <<1 x i64>> [#use… 24 …%4 = call x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx %tmp5, i32 32) nounwind readnone ; <<1 x i64>> [#…`
D	mmx-emms.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+mmx \| grep emms 4 call void @llvm.x86.mmx.emms( ) 11 declare void @llvm.x86.mmx.emms()`
D	mmx-insert-element.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 \| grep movq 2 ; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 \| grep pshufd`
D	2009-08-02-mmx-scalar-to-vector.ll	`3 declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32) 9 %t2 = tail call x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx %t0, i32 48)`
D	scalar-extract.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+mmx -o %t 4 ; Check that widening doesn't introduce a mmx register in this case when`
D	2007-04-25-MMX-PADDQ.ll	`1 ; RUN: llc < %s -o - -march=x86 -mattr=+mmx \| FileCheck %s 52 %tmp21 = call x86_mmx @llvm.x86.mmx.padd.q (x86_mmx %tmp19, x86_mmx %tmp14) ; <x86_mmx> [#uses=1] 53 …%tmp22 = call x86_mmx @llvm.x86.mmx.padd.q (x86_mmx %tmp21, x86_mmx %sum.035.0) ; <x86_mmx> [#use… 64 declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx)`
D	2007-05-15-maskmovq.ll	`10 tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp4, x86_mmx %tmp6, i8* %P ) 14 declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*)`
D	mmx-copy-gprs.ll	`6 ; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,`
D	2011-06-14-mmx-inlineasm.ll	`1 ; RUN: llc -mcpu=i686 -mattr=+mmx < %s \| FileCheck %s 38 tail call void @llvm.x86.mmx.emms() nounwind 42 declare void @llvm.x86.mmx.emms() nounwind`
D	2008-09-05-sinttofp-2xi32.ll	`1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx \| grep unpcklpd 2 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mattr=+mmx \| grep unpckhpd`
D	2008-08-23-64Bit-maskmovq.ll	`22 tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp, x86_mmx %tmp2, i8* null ) nounwind 29 declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*) nounwind`
/external/valgrind/main/memcheck/tests/x86/
D	xor-undef-x86.stdout.exp	`6 Complain mmx 8 No complain mmx`
D	insn_mmx.vgtest	`2 prereq: ../../../tests/x86_amd64_features x86-mmx`
/external/valgrind/main/memcheck/tests/amd64/
D	xor-undef-amd64.stdout.exp	`6 Complain mmx 8 No complain mmx`
/external/llvm/test/Transforms/InstCombine/
D	pr2645-1.ll	`34 call void @llvm.x86.mmx.emms( ) 39 declare void @llvm.x86.mmx.emms( )`
/external/valgrind/main/none/tests/x86/
D	insn_mmx.vgtest	`2 prereq: ../../../tests/x86_amd64_features x86-mmx`

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