Searched refs:processors (Results 1 – 25 of 64) sorted by relevance
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28 * The various processors and patterns are now stored with OrderedDicts rather 29 than lists. Any code adding processors and/or patterns into Python-Markdown 31 * The various types of processors available have been either combined, added, 32 or removed. Ensure that your processors match the currently supported types.
356 options for your extension and attach the various processors and patterns to 359 It is important to note that the order of the various processors and patterns 362 the various types of processors and patterns are stored within an instance of 365 processors and patterns into the appropriate location in an OrderedDict, remove376 access the [OrderedDict][]s of processors and patterns. They are found 400 Therefore, what you really should be doing is inserting processors and patterns521 # insert processors and patterns here
57 // Some processors have FP multiply-accumulate instructions that don't68 // Some processors benefit from using NEON instructions for scalar81 /// processors.121 "Cortex-A8 ARM processors",126 "Cortex-A9 ARM processors",
75 int processors() const { return processors_; } in processors() function
6 # instruction. On most x86 processors the retired_instruction
30 // XCore processors supported.
25 // SystemZ supported processors.
26 // MSP430 supported processors.
19 return win::OSInfo::GetInstance()->processors(); in NumberOfProcessors()
44 // SPARC processors supported.
50 // MBlaze processors supported.
15 Westmere micro-architecture processors21 * libop/op_hw_specific.h: User-space identification of processors59 Add support for new AMD processors (family12h/14h/15h)143 instead of "i386/core_i7". Core i7 processors can be either Nehalem145 Oprofile is only for Nehalem microarchitecture processors.198 * libutil/op_cpufreq.c: Add freq estimation for high performance mips processors
20 All tests were done with Intel processors. Feedback on other systems would,
46 dual processors. You will not for example see any speedup when
31 # Built-in memcmp can be inefficient when gcc compiles for x86 processors.
42 // SSE1+ processors support them.95 // X86 processors supported.
59 // PowerPC processors supported.
69 // Mips processors supported.
80 // PTX supported processors
74 2. Portability to different processors. Since we are most familiar with153 1. Commodity processors are getting massive SIMD support:159 3. Multiple processors on a die are right around the corner.
31 …,4 um:zero minimum:500 name:NEON_CYCLES : Number of cycles NEON and integer processors are not idle
44 on Intel processors. Also note that the core of MacOSX is called
127 // NoItineraries - A marker that can be used by processors without schedule
83 // Blackfin processors supported.