| /external/libffi/src/mips/ |
| D | n32.S | 62 move t9, callback # callback function pointer
86 jal t9
88 # Copy the stack pointer to t9
89 move t9, $sp
101 ADDU t9, t9, t8
109 REG_L a0, 0*FFI_SIZEOF_ARG(t9)
113 l.s $f12, 0*FFI_SIZEOF_ARG(t9)
116 l.d $f12, 0*FFI_SIZEOF_ARG(t9)
122 REG_L a1, 1*FFI_SIZEOF_ARG(t9)
126 l.s $f13, 1*FFI_SIZEOF_ARG(t9)
[all …]
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| D | o32.S | 61 move t9, callback # callback function pointer
77 jalr t9
136 REG_L t9, SIZEOF_FRAME + 5*FFI_SIZEOF_ARG($fp)
143 jalr t9
151 jalr t9
159 jalr t9
166 jalr t9
172 jalr t9
238 .cpload t9
269 la t9, ffi_closure_mips_inner_O32
[all …]
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| /external/llvm/test/CodeGen/X86/ |
| D | vec_ins_extract-1.ll | 8 %t9 = extractelement <4 x i32> %t13, i32 0
9 ret i32 %t9
13 %t9 = extractelement <4 x i32> %t13, i32 %t7
14 ret i32 %t9
17 %t9 = extractelement <4 x i32> %t8, i32 %t7
18 %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 0
22 %t9 = extractelement <4 x i32> %t8, i32 0
23 %t13 = insertelement <4 x i32> %t8, i32 %t9, i32 %t7
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| D | fast-isel-gep.ll | 9 %t9 = getelementptr i32* %t1, i32 %t3 ; <i32*> [#uses=1]
10 %t15 = load i32* %t9 ; <i32> [#uses=1]
23 %t9 = getelementptr i32* %t1, i64 %t3 ; <i32*> [#uses=1]
24 %t15 = load i32* %t9 ; <i32> [#uses=1]
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| /external/speex/libspeex/ |
| D | smallft.c | 278 int t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,t10; in dradfg() local
449 t9=t5; in dradfg()
452 ch2[t7++]+=ai2*c2[t9++]; in dradfg()
528 t9=t5; in dradfg()
532 cc[i+t7-1]=ch[i+t8-1]+ch[i+t9-1]; in dradfg()
533 cc[ic+t6-1]=ch[i+t8-1]-ch[i+t9-1]; in dradfg()
534 cc[i+t7]=ch[i+t8]+ch[i+t9]; in dradfg()
535 cc[ic+t6]=ch[i+t9]-ch[i+t8]; in dradfg()
540 t9+=ido; in dradfg()
560 t9=i+t5; in dradfg()
[all …]
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| /external/webkit/Source/JavaScriptCore/assembler/ |
| D | MIPSAssembler.h | 101 t9 = r25, enumerator
842 … *insn = 0x3c000000 | (MIPSRegisters::t9 << OP_SH_RT) | ((newTargetAddress >> 16) & 0xffff); in relocateJumps()
844 …*(insn + 1) = 0x34000000 | (MIPSRegisters::t9 << OP_SH_RT) | (MIPSRegisters::t9 << OP_SH_RS) | (ne… in relocateJumps()
846 *(insn + 2) = 0x00000008 | (MIPSRegisters::t9 << OP_SH_RS); in relocateJumps()
854 … *insn = 0x3c000000 | (MIPSRegisters::t9 << OP_SH_RT) | ((newTargetAddress >> 16) & 0xffff); in relocateJumps()
856 …*(insn + 1) = 0x34000000 | (MIPSRegisters::t9 << OP_SH_RT) | (MIPSRegisters::t9 << OP_SH_RS) | (ne… in relocateJumps()
925 … *insn = 0x3c000000 | (MIPSRegisters::t9 << OP_SH_RT) | ((newTargetAddress >> 16) & 0xffff); in linkWithOffset()
927 …*(insn + 1) = 0x34000000 | (MIPSRegisters::t9 << OP_SH_RT) | (MIPSRegisters::t9 << OP_SH_RS) | (ne… in linkWithOffset()
929 *(insn + 2) = 0x00000008 | (MIPSRegisters::t9 << OP_SH_RS); in linkWithOffset()
950 …*insn = 0x3c000000 | (MIPSRegisters::t9 << OP_SH_RT) | ((reinterpret_cast<intptr_t>(to) >> 16) & 0… in linkCallInternal()
[all …]
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| /external/llvm/test/Transforms/IndVarSimplify/ |
| D | eliminate-max.ll | 29 %t9 = sub i32 0, %t ; <i32> [#uses=3]
30 %t10 = icmp slt i32 %t9, 0 ; <i1> [#uses=1]
34 %t12 = icmp sgt i32 %t9, 255 ; <i1> [#uses=1]
35 %t13 = select i1 %t12, i32 255, i32 %t9 ; <i32> [#uses=1]
|
| D | eliminate-rem.ll | 19 %t6 = phi i64 [ %t9, %bb5 ], [ 0, %bb4 ] ; <i64> [#uses=2]
23 %t9 = add nsw i64 %t6, 1 ; <i64> [#uses=2]
24 %t10 = icmp slt i64 %t9, %arg ; <i1> [#uses=1]
53 %t9 = add nsw i64 %t8, -2 ; <i64> [#uses=1]
54 %t10 = srem i64 %t9, %arg1 ; <i64> [#uses=1]
|
| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 727 ASSERT(!rs.is(t9)); in Cvt_d_uw()
733 And(t9, rs, 0x7FFFFFFF); in Cvt_d_uw()
735 mtc1(t9, fd); in Cvt_d_uw()
747 Or(t9, zero_reg, 0x7FFFFFFF); in Cvt_d_uw()
748 mtc1(t9, f20); in Cvt_d_uw()
754 Or(t9, zero_reg, 1); in Cvt_d_uw()
755 mtc1(t9, f20); in Cvt_d_uw()
1615 li(t9, target); in Jump()
1616 jr(t9); in Jump()
1646 li(t9, target); in Jump()
[all …]
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| D | register-allocator-mips-inl.h | 114 t9, in ToRegister()
|
| /external/clang/test/CodeGen/ |
| D | ms_struct-bitfield-1.c | 79 } ATTR t9; variable
80 static int a9[(sizeof(t9) == 16) -1];
|
| D | ms_struct-bitfield.c | 108 } ATTR t9; variable
125 static int arr9[(sizeof(t9) == 28) -1];
|
| D | attributes.c | 31 void t9() __attribute__((weak, alias("__t8")));
|
| /external/llvm/test/Transforms/InstCombine/ |
| D | 2009-07-02-MaskedIntVector.ll | 9 %t9 = extractelement <2 x i64> %t11, i32 0 ; <i64> [#uses=1]
10 %t10 = bitcast i64 %t9 to <2 x i32> ; <<2 x i32>> [#uses=1]
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| D | lshr-phi.ll | 28 %t9 = load i8* %scevgep, align 1 ; <i8> [#uses=1]
29 %t10 = icmp eq i8 %t9, 0 ; <i1> [#uses=1]
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| /external/llvm/test/CodeGen/ARM/ |
| D | mul_const.ll | 3 define i32 @t9(i32 %v) nounwind readnone {
5 ; CHECK: t9:
|
| D | inlineasm3.ll | 94 define i32 @t9(i32 %r0) nounwind {
96 ; CHECK: t9
|
| /external/llvm/test/Transforms/LoopSimplify/ |
| D | merge-exits.ll | 26 %t9 = fadd float %t8, %peakCount.0 ; <float> [#uses=1]
30 %peakCount.0 = phi float [ %t0, %entry ], [ %t9, %bb ] ; <float> [#uses=2]
|
| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| D | uglygep.ll | 33 %t9 = getelementptr inbounds i8* %t8, i64 %t3 ; <i8*> [#uses=1]
34 store i8 undef, i8* %t9
|
| /external/clang/test/Sema/ |
| D | thread-specifier.c | 11 __thread extern int t9; in f()
|
| D | warn-char-subscripts.c | 53 void t9() { in t9() function
|
| D | function.c | 25 int t9(int a, ); // expected-error {{expected parameter declarator}}
|
| /external/openssl/crypto/bn/asm/ |
| D | mips3.s | 417 sltu t9,ta1,t1
421 daddu v0,t9
431 sltu t9,ta3,t3
435 daddu v0,t9
463 sltu t9,ta1,t1
467 daddu v0,t9
515 sltu t9,t1,ta1
519 MOVNZ (t1,v0,t9)
528 sltu t9,t3,ta3
532 MOVNZ (t3,v0,t9)
[all …]
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| /external/clang/test/Analysis/ |
| D | free.c | 41 void t9 () { in t9() function
|
| /external/llvm/test/Analysis/ScalarEvolution/ |
| D | nsw-offset.ll | 51 ; CHECK: %t9 = getelementptr inbounds double* %q, i64 %t8
53 %t9 = getelementptr inbounds double* %q, i64 %t8 ; <double*> [#uses=1]
|