/external/openssl/crypto/perlasm/ |
D | x86asm.pl | 53 &xchg(&HB(@_),&LB(@_)); 55 &xchg(&HB(@_),&LB(@_)); 66 sub ::exch { &xchg(@_); }
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/external/llvm/test/CodeGen/X86/ |
D | 2006-07-20-InlineAsm.ll | 10 …call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,m,1,~{dirflag},~{fpsr},~{flags}"( i32* … 19 …call void asm sideeffect "xchg{l} {$0,$1|$1,$0}", "=*m,=*r,1,~{dirflag},~{fpsr},~{flags}"( i32* @G…
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D | 9601.ll | 10 …%0 = call float asm sideeffect "xchg $0, $1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32*…
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D | inline-asm.ll | 43 …%0 = tail call i8 asm sideeffect "xchg $0, $1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i3…
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/external/webkit/Source/JavaScriptCore/wtf/ |
D | TCSpinLock.h | 87 xchg [eax], ebx ; exchange lockword_ and 1 in Lock() local 169 xchg [eax], ebx ; exchange *lockword and 1 in TCMalloc_SlowLock() local
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/external/kernel-headers/original/asm-arm/ |
D | system.h | 95 #define xchg(ptr,x) \ macro 98 #define tas(ptr) (xchg((ptr),1))
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D | atomic.h | 177 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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/external/kernel-headers/original/asm-x86/ |
D | apic_32.h | 60 xchg((volatile unsigned long *)(APIC_BASE+reg), v); in native_apic_write_atomic()
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D | pgtable-2level.h | 47 return __pte(xchg(&xp->pte_low, 0)); in native_ptep_get_and_clear()
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D | system_32.h | 293 #define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
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D | atomic_32.h | 219 #define atomic_xchg(v, new) (xchg(&((v)->counter), (new)))
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D | local_32.h | 170 #define local_xchg(l, n) (xchg(&((l)->a.counter), (n)))
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D | cmpxchg_32.h | 11 #define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr)))) macro
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/external/flac/libFLAC/ia32/ |
D | bitreader_asm.nasm | 280 xchg edx, ecx ; [edx <- cbits , ecx <- end] 284 xchg edx, ecx ; [edx <- end , ecx <- cbits] 406 xchg ebx, ecx 409 xchg ebx, ecx ; ebx <- parameter, ecx <- cbits 421 xchg eax, ecx 423 xchg eax, ecx 528 xchg ebx, ecx ; ebx <- cbits, ecx <- parameter 530 xchg ebx, ecx ; ebx <- parameter, ecx <- cbits
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/external/qemu/slirp-android/ |
D | tcp_subr.c | 142 #define xchg(a,b,type) { type t; t=a; a=b; b=t; } in tcp_respond() macro 143 xchg(ti->ti_dst, ti->ti_src, ipaddr_t); in tcp_respond() 144 xchg(ti->ti_dport, ti->ti_sport, port_t); in tcp_respond() 145 #undef xchg in tcp_respond()
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/external/openssl/crypto/bn/asm/ |
D | via-mont.pl | 137 &xchg ("ebp","esp"); # alloca
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/external/qemu/slirp/ |
D | tcp_subr.c | 140 #define xchg(a,b,type) { type t; t=a; a=b; b=t; } in tcp_respond() macro 141 xchg(ti->ti_dst.s_addr, ti->ti_src.s_addr, u_int32_t); in tcp_respond() 142 xchg(ti->ti_dport, ti->ti_sport, u_int16_t); in tcp_respond() 143 #undef xchg in tcp_respond()
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/external/openssl/crypto/sha/ |
D | sha512.c | 398 _asm xchg dh,dl in __pull64be() 399 _asm xchg ah,al in __pull64be() 402 _asm xchg dh,dl in __pull64be() 403 _asm xchg ah,al in __pull64be()
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/external/llvm/test/MC/MachO/ |
D | x86_32-optimal_nop.s | 14 # xchg %ax,%ax
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/external/llvm/lib/Target/X86/ |
D | X86InstrInfo.td | 1092 // Atomic swap. These are just normal xchg instructions. But since a memory 1096 "xchg{b}\t{$val, $ptr|$ptr, $val}", 1099 "xchg{w}\t{$val, $ptr|$ptr, $val}", 1103 "xchg{l}\t{$val, $ptr|$ptr, $val}", 1106 "xchg{q}\t{$val, $ptr|$ptr, $val}", 1110 "xchg{b}\t{$val, $src|$src, $val}", []>; 1112 "xchg{w}\t{$val, $src|$src, $val}", []>, OpSize; 1114 "xchg{l}\t{$val, $src|$src, $val}", []>; 1116 "xchg{q}\t{$val, $src|$src, $val}", []>; 1120 "xchg{w}\t{$src, %ax|%ax, $src}", []>, OpSize; [all …]
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/external/v8/src/x64/ |
D | lithium-gap-resolver-x64.cc | 249 __ xchg(dst, src); in EmitSwap() local
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/external/qemu/distrib/sdl-1.2.12/src/stdlib/ |
D | SDL_stdlib.c | 319 xchg eax,ecx in _allrem() 377 xchg eax,ecx in _aullrem()
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/external/v8/src/ia32/ |
D | lithium-gap-resolver-ia32.cc | 352 __ xchg(dst, src); in EmitSwap() local
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D | assembler-ia32.h | 725 void xchg(Register dst, Register src);
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/external/llvm/test/MC/X86/ |
D | x86-64.s | 780 xchg 0xdeadbeef(%rbx,%rcx,8),%bl label
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