/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 189 bits<4> Rn; 201 bits<4> Rn; 204 let Inst{19-16} = Rn; 240 bits<4> Rn; 243 let Inst{19-16} = Rn; 273 bits<4> Rn; 276 let Inst{19-16} = Rn; 285 bits<4> Rn; 289 let Inst{19-16} = Rn; 299 bits<4> Rn; [all …]
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D | ARMInstrInfo.td | 733 def ri : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, so_imm:$imm), DPFrm, 734 iii, opc, "\t$Rd, $Rn, $imm", 735 [(set GPR:$Rd, (opnode GPR:$Rn, so_imm:$imm))]> { 737 bits<4> Rn; 740 let Inst{19-16} = Rn; 745 def rr : AsI1<opcod, (outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm), DPFrm, 746 iir, opc, "\t$Rd, $Rn, $Rm", 747 [(set GPR:$Rd, (opnode GPR:$Rn, GPR:$Rm))]> { 749 bits<4> Rn; 753 let Inst{19-16} = Rn; [all …]
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D | ARMInstrThumb.td | 506 def tCBZ : T1I<(outs), (ins tGPR:$Rn, t_cbtarget:$target), IIC_Br, 507 "cbz\t$Rn, $target", []>, 511 bits<3> Rn; 514 let Inst{2-0} = Rn; 522 bits<3> Rn; 525 let Inst{2-0} = Rn; 722 T1I<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops), 723 itin, !strconcat(asm, "ia${p}\t$Rn, $regs"), []>, 725 bits<3> Rn; 727 let Inst{10-8} = Rn; [all …]
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D | ARMInstrNEON.td | 152 : PseudoVFPLdStM<(outs QPR:$dst), (ins GPR:$Rn), 154 [(set QPR:$dst, (v2f64 (load GPR:$Rn)))]>; 159 : PseudoVFPLdStM<(outs), (ins QPR:$src, GPR:$Rn), 161 [(store (v2f64 QPR:$src), GPR:$Rn)]>; 189 (ins addrmode6:$Rn), IIC_VLD1, 190 "vld1", Dt, "\\{$Vd\\}, $Rn", "", []> { 192 let Inst{4} = Rn{4}; 196 (ins addrmode6:$Rn), IIC_VLD1x2, 197 "vld1", Dt, "\\{$Vd, $dst2\\}, $Rn", "", []> { 199 let Inst{5-4} = Rn{5-4}; [all …]
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D | ARMInstrFormats.td | 74 // The instruction has an Rn register operand. 76 // it doesn't have a Rn operand. 433 bits<4> Rn; 437 let Inst{19-16} = Rn; 457 : AI<oops, iops, MiscFrm, NoItinerary, opc, "\t$Rt, $Rt2, [$Rn]", pattern> { 460 bits<4> Rn; 464 let Inst{19-16} = Rn; 532 bits<4> Rn; 535 let Inst{19-16} = Rn; 546 // {17-14} Rn [all …]
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D | ARMMCCodeEmitter.cpp | 617 unsigned Rn = getARMRegisterNumbering(MO1.getReg()); in getThumbAddrModeRegRegOpValue() local 619 return (Rm << 3) | Rn; in getThumbAddrModeRegRegOpValue() 761 unsigned Rn = getARMRegisterNumbering(MO.getReg()); in getLdStSORegOpValue() local 776 Binary |= Rn << 13; in getLdStSORegOpValue() 792 unsigned Rn = getARMRegisterNumbering(MO.getReg()); in getAddrMode2OpValue() local 794 Binary |= Rn << 14; in getAddrMode2OpValue() 850 unsigned Rn = getARMRegisterNumbering(MO.getReg()); in getAddrMode3OpValue() local 858 return (Rn << 9) | Imm8 | (isAdd << 8) | (isImm << 13); in getAddrMode3OpValue() 885 unsigned Rn = getARMRegisterNumbering(MO.getReg()); in getAddrModeISOpValue() local 887 return ((Imm5 & 0x1f) << 3) | Rn; in getAddrModeISOpValue()
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D | ARMInstrVFP.td | 89 AXDI4<(outs), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, variable_ops), 91 !strconcat(asm, "ia${p}\t$Rn, $regs"), "", []> { 97 AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, 100 !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> { 106 AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs, 109 !strconcat(asm, "db${p}\t$Rn!, $regs"), "$Rn = $wb", []> { 117 AXSI4<(outs), (ins GPR:$Rn, pred:$p, spr_reglist:$regs, variable_ops), 119 !strconcat(asm, "ia${p}\t$Rn, $regs"), "", []> { 129 AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, spr_reglist:$regs, 132 !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> { [all …]
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/external/qemu/ |
D | trace.c | 896 int Rn = (insn >> 12) & 15; in get_insn_ticks_arm() local 899 result += _interlock_use(Rn); in get_insn_ticks_arm() 901 if (Rn != 0) /* UNDEFINED */ in get_insn_ticks_arm() 934 int Rn = (insn >> 16) & 15; in get_insn_ticks_arm() local 936 result += _interlock_use(Rn) + _interlock_use(Rm); in get_insn_ticks_arm() 943 int Rn = (insn >> 16) & 15; in get_insn_ticks_arm() local 945 result += _interlock_use(Rn); in get_insn_ticks_arm() 957 int Rn = (insn >> 16) & 15; in get_insn_ticks_arm() local 959 result += _interlock_use(Rn) + _interlock_use(Rm); in get_insn_ticks_arm() 970 int Rn = (insn >> 16) & 15; in get_insn_ticks_arm() local [all …]
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D | arm-dis.c | 3450 unsigned int Rn = (given & 0x000f0000) >> 16; in print_insn_thumb32() local 3458 func (stream, "[%s", arm_regnames[Rn]); in print_insn_thumb32() 3461 else if (Rn == 15) /* 12-bit negative immediate offset */ in print_insn_thumb32() 3517 if (Rn == 15) in print_insn_thumb32() 3531 unsigned int Rn = (given & 0x000f0000) >> 16; in print_insn_thumb32() local 3534 func (stream, "[%s", arm_regnames[Rn]); in print_insn_thumb32()
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/external/llvm/lib/Target/ARM/Disassembler/ |
D | ThumbDisassemblerCore.h | 1159 unsigned Rn = decodeRn(insn); in DisassembleThumb2RFE() local 1160 if (Rn == 15) { in DisassembleThumb2RFE() 1164 MI.addOperand(MCOperand::CreateReg(getRegisterEnum(B,ARM::GPRRegClassID,Rn))); in DisassembleThumb2RFE() 1248 unsigned Rn = decodeRn(insn); in DisassembleThumb2LdStEx() local 1255 if (Rd == Rn || Rd == Rt || Rd == Rt2) { in DisassembleThumb2LdStEx() 1261 if (Rt2 == Rn || Rt2 == Rt) { in DisassembleThumb2LdStEx() 1266 if (Rd == Rn || Rd == Rt) { in DisassembleThumb2LdStEx() 1304 Rn))); in DisassembleThumb2LdStEx() 1332 unsigned Rn = decodeRn(insn); in DisassembleThumb2LdStDual() local 1338 if (Rn == 15 && slice(insn, 21, 21) != 0) in DisassembleThumb2LdStDual() [all …]
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D | ARMDisassemblerCore.cpp | 1185 unsigned Rn = decodeRn(insn); in BadRegsLdStFrm() local 1196 if (WBack && (Rn == 15 || Rn == Rt)) { in BadRegsLdStFrm() 1212 if (Rn == 15) { in BadRegsLdStFrm() 1226 if (WBack && (Rn == Rt)) { in BadRegsLdStFrm() 1237 if (WBack && (Rn == 15 || Rn == Rt)) { in BadRegsLdStFrm() 2423 unsigned Rn = decodeRn(insn); in DisassembleNLdSt0() local 2443 Rn))); in DisassembleNLdSt0() 2451 Rn))); in DisassembleNLdSt0() 2494 Rn))); in DisassembleNLdSt0() 2502 Rn))); in DisassembleNLdSt0() [all …]
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/external/llvm/test/MC/Disassembler/ARM/ |
D | invalid-t2STR_POST-thumb.txt | 9 # if Rn == '1111' then UNDEFINED
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D | invalid-LDRD_PRE-thumb.txt | 10 # if Rn = '1111' then SEE LDRD (literal)
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/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/es-ES/ |
D | es-ES_kdt_g2p.pkb | 11 �U����9���rEL_^��ZdM��e���8�X��4�չE%Mg�>�h�i�>K'`(>~B`�Z�,Rn
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D | es-ES_zl0_kpdf_mgc.pkb | 3210 Rn{�Qp�fc0hD`WmMN�mX.8ZN?%VKR0J^CeArrn[�-7P3;ECCQQ�I��7�������W�M��U�3�i^������!�V��…
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/external/openssl/crypto/pkcs7/ |
D | es1.pem | 22 Rn/KOhHaYP2VzAh40gQIvKMAAWh9oFsEEIMwIoOmLwLH5wf+8QdbDhoECH8HwZt9a12dBAjL
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/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/it-IT/ |
D | it-IT_cm0_kdt_dur.pkb | 76 �!6Rn���zp���!YH7�������9�D�'��r��Zld�X�Tj
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/external/valgrind/main/none/tests/arm/ |
D | vfp.stdout.exp | 873 vldr d30, [r12] :: Dd 0x00000dd3 0x00000cc2 *(int*) (Rn + shift) 0x0cc2 878 vldr d18, [r3] :: Dd 0x00000dd3 0x00000cc2 *(int*) (Rn + shift) 0x0cc2 880 vldr d17, [r10] :: Dd 0x00000dd3 0x00000cc2 *(int*) (Rn + shift) 0x0cc2 884 vldr d8, [r4] :: Dd 0x00000dd3 0x00000cc2 *(int*) (Rn + shift) 0x0cc2 890 vldr s30, [r12] :: Sd 0x00000cc2 *(int*) (Rn + shift) 0x0cc2 895 vldr s18, [r3] :: Sd 0x00000cc2 *(int*) (Rn + shift) 0x0cc2 897 vldr s17, [r10] :: Sd 0x00000cc2 *(int*) (Rn + shift) 0x0cc2 901 vldr s8, [r4] :: Sd 0x00000cc2 *(int*) (Rn + shift) 0x0cc2
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/external/jpeg/ |
D | testimg.ppm | 4 …Rn�So�Tr�Xt�Zu�]u�[t�Xt�Wv�Xw�Wv�Wv�Uu�Tt�S{�[{�]z�^u�[m�Ub~MXrCSj>AW0?U/<R,[K;^N>`P@`P@`P@_O?`P@a…
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/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/de-DE/ |
D | de-DE_gl0_kpdf_mgc.pkb | 2155 …���������K�`\������u�;��}���e�P��?G�|��G����w����_�t�\�Rn����_�<c�m>26&^fU��懙�…
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/external/pcre/doc/ |
D | pcre.txt | 5999 (?(Rn)... specific group recursion condition
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