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Searched refs:fpucw (Results 1 – 10 of 10) sorted by relevance

/external/valgrind/main/none/tests/x86/
Dinsn_sse3.def20 fisttps fpucw[0xc00,0x000] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] st0.ps[111…
21 fisttps fpucw[0xc00,0x000] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1234] st0.ps[1…
22 fisttps fpucw[0xc00,0x400] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] st0.ps[111…
23 fisttps fpucw[0xc00,0x400] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1234] st0.ps[1…
24 fisttps fpucw[0xc00,0x800] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] st0.ps[111…
25 fisttps fpucw[0xc00,0x800] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1234] st0.ps[1…
26 fisttps fpucw[0xc00,0xc00] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] st0.ps[111…
27 fisttps fpucw[0xc00,0xc00] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1234] st0.ps[1…
28 fisttpl fpucw[0xc00,0x000] st0.pd[1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => 0.sd[1234567] s…
29 fisttpl fpucw[0xc00,0x000] st0.pd[-1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => 0.sd[-1234567]…
[all …]
Dinsn_fpu.def213 fists fpucw[0xc00,0x000] st0.ps[1234.5678] : m16.sw[0] => 0.sw[1235] st0.ps[1234.5678]
214 fists fpucw[0xc00,0x000] st0.ps[-1234.5678] : m16.sw[0] => 0.sw[-1235] st0.ps[-1234.5678]
215 fists fpucw[0xc00,0x400] st0.ps[1234.5678] : m16.sw[0] => 0.sw[1234] st0.ps[1234.5678]
216 fists fpucw[0xc00,0x400] st0.ps[-1234.5678] : m16.sw[0] => 0.sw[-1235] st0.ps[-1234.5678]
217 fists fpucw[0xc00,0x800] st0.ps[1234.5678] : m16.sw[0] => 0.sw[1235] st0.ps[1234.5678]
218 fists fpucw[0xc00,0x800] st0.ps[-1234.5678] : m16.sw[0] => 0.sw[-1234] st0.ps[-1234.5678]
219 fists fpucw[0xc00,0xc00] st0.ps[1234.5678] : m16.sw[0] => 0.sw[1234] st0.ps[1234.5678]
220 fists fpucw[0xc00,0xc00] st0.ps[-1234.5678] : m16.sw[0] => 0.sw[-1234] st0.ps[-1234.5678]
221 fistl fpucw[0xc00,0x000] st0.pd[1234567.7654321] : m32.sd[0] => 0.sd[1234568] st0.pd[1234567.765432…
222 fistl fpucw[0xc00,0x000] st0.pd[-1234567.7654321] : m32.sd[0] => 0.sd[-1234568] st0.pd[-1234567.765…
[all …]
Dgen_insn_test.pl20 fpucw => "reg16_t",
/external/valgrind/main/none/tests/amd64/
Dinsn_sse3.def20 fisttps fpucw[0xc00,0x000] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] st0.ps[111…
21 fisttps fpucw[0xc00,0x000] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1234] st0.ps[1…
22 fisttps fpucw[0xc00,0x400] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] st0.ps[111…
23 fisttps fpucw[0xc00,0x400] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1234] st0.ps[1…
24 fisttps fpucw[0xc00,0x800] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] st0.ps[111…
25 fisttps fpucw[0xc00,0x800] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1234] st0.ps[1…
26 fisttps fpucw[0xc00,0xc00] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] st0.ps[111…
27 fisttps fpucw[0xc00,0xc00] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1234] st0.ps[1…
28 fisttpl fpucw[0xc00,0x000] st0.pd[1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => 0.sd[1234567] s…
29 fisttpl fpucw[0xc00,0x000] st0.pd[-1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => 0.sd[-1234567]…
[all …]
Dinsn_fpu.def213 fists fpucw[0xc00,0x000] st0.ps[1234.5678] : m16.sw[0] => 0.sw[1235] st0.ps[1234.5678]
214 fists fpucw[0xc00,0x000] st0.ps[-1234.5678] : m16.sw[0] => 0.sw[-1235] st0.ps[-1234.5678]
215 fists fpucw[0xc00,0x400] st0.ps[1234.5678] : m16.sw[0] => 0.sw[1234] st0.ps[1234.5678]
216 fists fpucw[0xc00,0x400] st0.ps[-1234.5678] : m16.sw[0] => 0.sw[-1235] st0.ps[-1234.5678]
217 fists fpucw[0xc00,0x800] st0.ps[1234.5678] : m16.sw[0] => 0.sw[1235] st0.ps[1234.5678]
218 fists fpucw[0xc00,0x800] st0.ps[-1234.5678] : m16.sw[0] => 0.sw[-1234] st0.ps[-1234.5678]
219 fists fpucw[0xc00,0xc00] st0.ps[1234.5678] : m16.sw[0] => 0.sw[1234] st0.ps[1234.5678]
220 fists fpucw[0xc00,0xc00] st0.ps[-1234.5678] : m16.sw[0] => 0.sw[-1234] st0.ps[-1234.5678]
221 fistl fpucw[0xc00,0x000] st0.pd[1234567.7654321] : m32.sd[0] => 0.sd[1234568] st0.pd[1234567.765432…
222 fistl fpucw[0xc00,0x000] st0.pd[-1234567.7654321] : m32.sd[0] => 0.sd[-1234568] st0.pd[-1234567.765…
[all …]
Dgen_insn_test.pl21 fpucw => "reg16_t",
/external/valgrind/main/VEX/priv/
Dguest_x86_defs.h113 extern ULong x86g_check_fldcw ( UInt fpucw );
Dguest_amd64_defs.h113 extern ULong amd64g_check_fldcw ( ULong fpucw );
Dguest_amd64_helpers.c1472 UInt fpucw = x87->env[FP_ENV_CTRL]; in do_put_x87() local
1508 pair = amd64g_check_fldcw ( (ULong)fpucw ); in do_put_x87()
1845 ULong amd64g_check_fldcw ( ULong fpucw ) in amd64g_check_fldcw() argument
1849 ULong rmode = (fpucw >> 10) & 3; in amd64g_check_fldcw()
1854 if ((fpucw & 0x3F) != 0x3F) { in amd64g_check_fldcw()
1859 if (((fpucw >> 8) & 3) != 3) { in amd64g_check_fldcw()
1891 UInt fpucw = x87->env[FP_ENV_CTRL]; in amd64g_dirtyhelper_FLDENV() local
1918 pair = amd64g_check_fldcw ( (ULong)fpucw ); in amd64g_dirtyhelper_FLDENV()
Dguest_x86_helpers.c1468 ULong x86g_check_fldcw ( UInt fpucw ) in x86g_check_fldcw() argument
1472 UInt rmode = (fpucw >> 10) & 3; in x86g_check_fldcw()
1477 if ((fpucw & 0x3F) != 0x3F) { in x86g_check_fldcw()
1482 if (((fpucw >> 8) & 3) != 3) { in x86g_check_fldcw()
1574 UInt fpucw = x87->env[FP_ENV_CTRL]; in do_put_x87() local
1610 pair = x86g_check_fldcw ( (UInt)fpucw ); in do_put_x87()