/external/llvm/lib/Target/ |
D | TargetInstrInfo.cpp | 54 unsigned Class = MI->getDesc().getSchedClass(); in getNumMicroOps() 71 unsigned DefClass = DefMI->getDesc().getSchedClass(); in getOperandLatency() 72 unsigned UseClass = UseMI->getDesc().getSchedClass(); in getOperandLatency() 99 return ItinData->getStageLatency(MI->getDesc().getSchedClass()); in getInstrLatency() 119 unsigned DefClass = DefMI->getDesc().getSchedClass(); in hasLowDefLatency() 133 const MCInstrDesc &MCID = MI->getDesc(); in isUnpredicatedTerminator()
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/external/llvm/lib/CodeGen/ |
D | TargetInstrInfoImpl.cpp | 62 const MCInstrDesc &MCID = MI->getDesc(); in commuteInstruction() 84 assert(MI->getDesc().getOperandConstraint(0, MCOI::TIED_TO) && in commuteInstruction() 97 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) in commuteInstruction() 102 return BuildMI(MF, MI->getDebugLoc(), MI->getDesc()) in commuteInstruction() 122 const MCInstrDesc &MCID = MI->getDesc(); in findCommutedOpIndices() 140 const MCInstrDesc &MCID = MI->getDesc(); in PredicateInstruction() 183 assert(!Orig->getDesc().isNotDuplicable() && in duplicate() 253 NewMI->getDesc().mayStore()) && in foldMemoryOperand() 256 NewMI->getDesc().mayLoad()) && in foldMemoryOperand() 297 assert(LoadMI->getDesc().canFoldAsLoad() && "LoadMI isn't foldable!"); in foldMemoryOperand() [all …]
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D | PeepholeOptimizer.cpp | 269 unsigned NumDefs = MI->getDesc().getNumDefs(); in OptimizeBitcastInstr() 270 unsigned NumSrcs = MI->getDesc().getNumOperands() - NumDefs; in OptimizeBitcastInstr() 295 if (!DefMI || !DefMI->getDesc().isBitcast()) in OptimizeBitcastInstr() 300 NumDefs = DefMI->getDesc().getNumDefs(); in OptimizeBitcastInstr() 301 NumSrcs = DefMI->getDesc().getNumOperands() - NumDefs; in OptimizeBitcastInstr() 356 const MCInstrDesc &MCID = MI->getDesc(); in isMoveImmediate() 377 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) { in FoldImmediate() 432 const MCInstrDesc &MCID = MI->getDesc(); in runOnMachineFunction()
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D | CriticalAntiDepBreaker.cpp | 57 bool IsReturnBlock = (!BB->empty() && BB->back().getDesc().isReturn()); in StartBlock() 196 bool Special = MI->getDesc().isCall() || in PrescanInstruction() 197 MI->getDesc().hasExtraSrcRegAllocReq() || in PrescanInstruction() 209 if (i < MI->getDesc().getNumOperands()) in PrescanInstruction() 210 NewRC = TII->getRegClass(MI->getDesc(), i, TRI); in PrescanInstruction() 297 if (i < MI->getDesc().getNumOperands()) in ScanInstruction() 298 NewRC = TII->getRegClass(MI->getDesc(), i, TRI); in ScanInstruction() 575 if (MI->getDesc().isCall() || MI->getDesc().hasExtraDefRegAllocReq() || in BreakAntiDependencies()
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D | ScheduleDAGInstrs.cpp | 159 (ExitMI->getDesc().isCall() || ExitMI->getDesc().isBarrier()); in AddSchedBarrierDeps() 240 const MCInstrDesc &MCID = MI->getDesc(); in BuildSchedGraph() 313 const MCInstrDesc &UseMCID = UseMI->getDesc(); in BuildSchedGraph() 356 const MCInstrDesc &UseMCID = UseMI->getDesc(); in BuildSchedGraph() 578 if (SU->getInstr()->getDesc().mayLoad()) in ComputeLatency() 603 DefIdx >= (int)DefMI->getDesc().getNumOperands()) { in ComputeOperandLatency() 632 unsigned DefClass = DefMI->getDesc().getSchedClass(); in ComputeOperandLatency()
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D | AggressiveAntiDepBreaker.cpp | 151 bool IsReturnBlock = (!BB->empty() && BB->back().getDesc().isReturn()); in StartBlock() 387 if (MI->getDesc().isCall() || MI->getDesc().hasExtraDefRegAllocReq() || in PrescanInstruction() 406 if (i < MI->getDesc().getNumOperands()) in PrescanInstruction() 407 RC = TII->getRegClass(MI->getDesc(), i, TRI); in PrescanInstruction() 454 bool Special = MI->getDesc().isCall() || in ScanInstruction() 455 MI->getDesc().hasExtraSrcRegAllocReq() || in ScanInstruction() 481 if (i < MI->getDesc().getNumOperands()) in ScanInstruction() 482 RC = TII->getRegClass(MI->getDesc(), i, TRI); in ScanInstruction()
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D | MachineVerifier.cpp | 434 if (!MBB->empty() && MBB->back().getDesc().isBarrier() && in visitMachineBasicBlockBefore() 455 } else if (!MBB->back().getDesc().isBarrier()) { in visitMachineBasicBlockBefore() 458 } else if (!MBB->back().getDesc().isTerminator()) { in visitMachineBasicBlockBefore() 478 } else if (MBB->back().getDesc().isBarrier()) { in visitMachineBasicBlockBefore() 481 } else if (!MBB->back().getDesc().isTerminator()) { in visitMachineBasicBlockBefore() 498 } else if (!MBB->back().getDesc().isBarrier()) { in visitMachineBasicBlockBefore() 501 } else if (!MBB->back().getDesc().isTerminator()) { in visitMachineBasicBlockBefore() 544 const MCInstrDesc &MCID = MI->getDesc(); in visitMachineInstrBefore() 578 const MCInstrDesc &MCID = MI->getDesc(); in visitMachineOperand()
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D | MachineInstr.cpp | 545 : MCID(&MI.getDesc()), NumImplicitOps(0), Flags(0), AsmPrinterFlags(0), in MachineInstr() 944 const MCInstrDesc &MCID = getDesc(); in findFirstPredOperandIdx() 1003 const MCInstrDesc &MCID = getDesc(); in isRegTiedToUseOperand() 1063 const MCInstrDesc &MCID = getDesc(); in isRegTiedToDefOperand() 1109 const MCInstrDesc &MCID = MI->getDesc(); in copyPredicates() 1282 if (getDesc().hasUnmodeledSideEffects()) in hasUnmodeledSideEffects() 1309 for (unsigned i = MI->getDesc().getNumOperands(), e = MI->getNumOperands(); in copyImplicitOps() 1375 OS << getDesc().getName(); in print() 1410 if (MF && getDesc().isCall() && in print() 1433 if (i < getDesc().NumOperands) { in print() [all …]
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D | MachineCSE.cpp | 263 const MCInstrDesc &MCID = MI->getDesc(); in isCSECandidate() 290 if (MI->getDesc().isAsCheapAsAMove()) { in isProfitableToCSE() 379 if (!FoundCSE && MI->getDesc().isCommutable()) { in ProcessBlock() 424 unsigned NumDefs = MI->getDesc().getNumDefs(); in ProcessBlock()
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D | MachineLICM.cpp | 619 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) { in InitRegPressure() 652 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) { in UpdateRegPressure() 820 if (MI.getDesc().isAsCheapAsAMove() || MI.isCopyLike()) in IsCheapInstruction() 826 unsigned NumDefs = MI.getDesc().getNumDefs(); in IsCheapInstruction() 874 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) { in UpdateBackTraceRegPressure() 937 for (unsigned i = 0, e = MI.getDesc().getNumOperands(); i != e; ++i) { in IsProfitableToHoist() 1004 if (MI->getDesc().canFoldAsLoad()) in ExtractHoistableLoad()
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D | MachineBasicBlock.cpp | 158 while (I != begin() && ((--I)->getDesc().isTerminator() || I->isDebugValue())) in getFirstTerminator() 160 while (I != end() && !I->getDesc().isTerminator()) in getFirstTerminator() 481 return empty() || !back().getDesc().isBarrier() || in canFallThrough() 482 back().getDesc().isPredicable(); in canFallThrough() 674 if (!I->getDesc().isTerminator()) break; in ReplaceUsesOfBlockWith()
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D | ExpandISelPseudos.cpp | 65 const MCInstrDesc &MCID = MI->getDesc(); in runOnMachineFunction()
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/external/llvm/lib/Target/Sparc/ |
D | DelaySlotFiller.cpp | 103 if (I->getDesc().hasDelaySlot()) { in runOnMachineBasicBlock() 152 if (slot->getDesc().isCall()) in findDelayInstr() 173 || I->getDesc().hasDelaySlot() in findDelayInstr() 197 if (candidate->getDesc().mayLoad()) { in delayHasHazard() 203 if (candidate->getDesc().mayStore()) { in delayHasHazard() 301 const MCInstrDesc &prevdesc = (--candidate)->getDesc(); in isDelayFiller() 307 if (!I->getDesc().isCall()) in needsUnimp()
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D | SparcAsmPrinter.cpp | 240 while (I != Pred->begin() && !(--I)->getDesc().isTerminator()) in isBlockOnlyReachableByFallthrough() 242 return I == Pred->end() || !I->getDesc().isBarrier(); in isBlockOnlyReachableByFallthrough()
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/external/llvm/lib/Target/MBlaze/ |
D | MBlazeDelaySlotFiller.cpp | 112 MCInstrDesc desc = candidate->getDesc(); in delayHasHazard() 159 if (a_is_memory && m->getDesc().mayStore()) in delayHasHazard() 186 MCInstrDesc brdesc = (--candidate)->getDesc(); in isDelayFiller() 214 MCInstrDesc desc = I->getDesc(); in findDelayInstr() 235 if (I->getDesc().hasDelaySlot()) { in runOnMachineBasicBlock()
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D | MBlazeAsmPrinter.cpp | 316 while (I != Pred->begin() && !(--I)->getDesc().isTerminator()) in isBlockOnlyReachableByFallthrough() 318 return I == Pred->end() || !I->getDesc().isBarrier(); in isBlockOnlyReachableByFallthrough()
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/external/llvm/lib/Target/ARM/ |
D | ARMHazardRecognizer.cpp | 22 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() 46 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType() 49 const MCInstrDesc &LastMCID = LastMI->getDesc(); in getHazardType()
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D | ARMCodeEmitter.cpp | 275 const MCInstrDesc &MCID = MI.getDesc(); in getHiLo16ImmOpValue() 464 const MCInstrDesc &MCID = MI.getDesc(); in getMachineOpValue() 546 switch (MI.getDesc().TSFlags & ARMII::FormMask) { in emitInstruction() 806 const MCInstrDesc &MCID = MI.getDesc(); in emitLEApcrelInstruction() 833 const MCInstrDesc &MCID = MI.getDesc(); in emitLEApcrelJTInstruction() 858 unsigned Opcode = MI.getDesc().Opcode; in emitPseudoMoveInstruction() 903 unsigned Opcode = MI.getDesc().Opcode; in emitPseudoInstruction() 1084 const MCInstrDesc &MCID = MI.getDesc(); in emitDataProcessingInstruction() 1187 const MCInstrDesc &MCID = MI.getDesc(); in emitLoadStoreInstruction() 1271 const MCInstrDesc &MCID = MI.getDesc(); in emitMiscLoadStoreInstruction() [all …]
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D | Thumb2SizeReduction.cpp | 272 if (!HasImplicitCPSRDef(MI->getDesc())) in VerifyPredAndCC() 500 const MCInstrDesc &MCID = MI->getDesc(); in ReduceSpecial() 524 const MCInstrDesc &MCID = MI->getDesc(); in ReduceSpecial() 622 const MCInstrDesc &MCID = MI->getDesc(); in ReduceTo2Addr() 680 const MCInstrDesc &MCID = MI->getDesc(); in ReduceToNarrow() 855 if (MI->getDesc().isCall()) in ReduceMBB()
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D | Thumb2ITBlockPass.cpp | 180 (!MI->getDesc().isBranch() && !MI->getDesc().isReturn()) ; ++MBBI) { in InsertITInstructions()
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/external/llvm/lib/Support/ |
D | Statistic.cpp | 89 return std::strcmp(LHS->getDesc(), RHS->getDesc()) < 0; in operator ()() 134 << " - " << Stats.Stats[i]->getDesc() << "\n"; in PrintStatistics()
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/external/llvm/lib/Target/X86/ |
D | SSEDomainFix.cpp | 308 for (unsigned i = mi->getDesc().getNumDefs(), in visitHardInstr() 309 e = mi->getDesc().getNumOperands(); i != e; ++i) { in visitHardInstr() 318 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) { in visitHardInstr() 337 for (unsigned i = mi->getDesc().getNumDefs(), in visitSoftInstr() 338 e = mi->getDesc().getNumOperands(); i != e; ++i) { in visitSoftInstr() 422 for (unsigned i = 0, e = mi->getDesc().getNumOperands(); i != e; ++i) { in visitSoftInstr() 436 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) { in visitGenericInstr()
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/external/llvm/include/llvm/Support/ |
D | Registry.h | 31 const char *getDesc() const { return Desc; } in getDesc() function 48 static const char *descof(const entry &Entry) { return Entry.getDesc(); } in descof()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.cpp | 164 const MCInstrDesc &MCID = MI->getDesc(); in isUnpredicatedTerminator() 195 if (!I->getDesc().isBranch()) in AnalyzeBranch() 299 const MCInstrDesc &Desc = MI->getDesc(); in GetInstSizeInBytes()
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/external/llvm/lib/Target/Mips/ |
D | MipsDelaySlotFiller.cpp | 62 const MCInstrDesc& MCid = I->getDesc(); in runOnMachineBasicBlock()
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