1022   SlotIndex NewIdx;  member in LiveIntervals::HMEditor
1038            const TargetRegisterInfo& TRI, SlotIndex NewIdx)  in HMEditor()  argument
1039     : LIS(LIS), MRI(MRI), TRI(TRI), NewIdx(NewIdx) {}  in HMEditor()
1045     assert(NewIdx != OldIdx && "No-op move? That's a bit strange.");  in moveAllRangesFrom()
1055     if (NewIdx < OldIdx) {  in moveAllRangesFrom()
1093     collectRanges(BII, Entering, Internal, Exiting, hasRegMaskOp, NewIdx);  in moveAllRangesInto()
1098       collectRanges(BII, Entering, Internal, Exiting, hasRegMaskOp, NewIdx);  in moveAllRangesInto()
1297     *RI = NewIdx;  in updateRegMaskSlots()
1304     SlotIndex LastUse = NewIdx;  in findLastUseBefore()
1324     if (LastUse != NewIdx)  in moveEnteringUpFrom()
1325       moveKillFlags(LI->reg, NewIdx, LastUse);  in moveEnteringUpFrom()
1333     if (NewIdx > LR->end) {  in moveEnteringDownFrom()
1338         moveKillFlags(LI->reg, LR->end, NewIdx);  in moveEnteringDownFrom()
1340       LR->end = NewIdx.getRegSlot();  in moveEnteringDownFrom()
1345     bool GoingUp = NewIdx < OldIdx;  in moveAllEnteringFrom()
1365     Tmp.start = NewIdx.getRegSlot(LR->start.isEarlyClobber());  in moveInternalFrom()
1367     Tmp.end = LR->end.isDead() ? NewIdx.getDeadSlot() : NewIdx.getRegSlot();  in moveInternalFrom()
1383     SlotIndex NewStart = NewIdx.getRegSlot(LR->start.isEarlyClobber());  in moveExitingFrom()
1400       assert((LR->start < NewIdx || BR[LI->reg].Def == LR) &&  in moveEnteringUpFromInto()
1411     if (LR->start < NewIdx) {  in moveEnteringUpFromInto()
1421       assert(LR->start == NewIdx.getRegSlot(LR->start.isEarlyClobber()) &&  in moveEnteringUpFromInto()
1436     if (NewIdx > LR->end) {  in moveEnteringDownFromInto()
1441       moveKillFlags(LI->reg, LR->end, NewIdx);  in moveEnteringDownFromInto()
1442       LR->end = NewIdx.getRegSlot();  in moveEnteringDownFromInto()
1452     bool GoingUp = NewIdx < OldIdx;  in moveAllEnteringFromInto()
1485     if (LR->end > NewIdx.getDeadSlot()) {  in moveExitingFromInto()
1494       LR->start = NewIdx.getRegSlot();  in moveExitingFromInto()
1499       assert(LR->end == NewIdx.getRegSlot() &&  in moveExitingFromInto()
1506         LR->end = NewIdx.getDeadSlot();  in moveExitingFromInto()