251     unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo());  in getVR()  local
254     if (!VReg) {  in getVR()
256       VReg = MRI->createVirtualRegister(RC);  in getVR()
259             TII->get(TargetOpcode::IMPLICIT_DEF), VReg);  in getVR()
260     return VReg;  in getVR()
282   unsigned VReg = getVR(Op, VRBaseMap);  in AddRegisterOperand()  local
283   assert(TargetRegisterInfo::isVirtualRegister(VReg) && "Not a vreg?");  in AddRegisterOperand()
299     if (DstRC && !MRI->constrainRegClass(VReg, DstRC, MinRCSize)) {  in AddRegisterOperand()
302               TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg);  in AddRegisterOperand()
303       VReg = NewVReg;  in AddRegisterOperand()
328   MI->addOperand(MachineOperand::CreateReg(VReg, isOptDef,  in AddRegisterOperand()
402 unsigned InstrEmitter::ConstrainForSubReg(unsigned VReg, unsigned SubIdx,  in ConstrainForSubReg()  argument
404   const TargetRegisterClass *VRC = MRI->getRegClass(VReg);  in ConstrainForSubReg()
410     RC = MRI->constrainRegClass(VReg, RC, MinRCSize);  in ConstrainForSubReg()
414     return VReg;  in ConstrainForSubReg()
422     .addReg(VReg);  in ConstrainForSubReg()
456     unsigned VReg = getVR(Node->getOperand(0), VRBaseMap);  in EmitSubregNode()  local
457     MachineInstr *DefMI = MRI->getVRegDef(VReg);  in EmitSubregNode()
474       VReg = ConstrainForSubReg(VReg, SubIdx,  in EmitSubregNode()
484               TII->get(TargetOpcode::COPY), VRBase).addReg(VReg, 0, SubIdx);  in EmitSubregNode()
547   unsigned VReg = getVR(Node->getOperand(0), VRBaseMap);  in EmitCopyToRegClassNode()  local
554     NewVReg).addReg(VReg);  in EmitCopyToRegClassNode()