Lines Matching refs:Ops
1386 SDValue Ops[]= { Base, AMOpc, getAL(CurDAG), in SelectARMIndexedLoad() local
1389 MVT::i32, MVT::Other, Ops, 5); in SelectARMIndexedLoad()
1393 SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG), in SelectARMIndexedLoad() local
1396 MVT::i32, MVT::Other, Ops, 6); in SelectARMIndexedLoad()
1442 SDValue Ops[]= { Base, Offset, getAL(CurDAG), in SelectT2IndexedLoad() local
1445 MVT::Other, Ops, 5); in SelectT2IndexedLoad()
1459 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in PairSRegs() local
1460 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 5); in PairSRegs()
1470 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in PairDRegs() local
1471 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 5); in PairDRegs()
1481 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in PairQRegs() local
1482 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 5); in PairQRegs()
1496 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in QuadSRegs() local
1498 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 9); in QuadSRegs()
1511 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in QuadDRegs() local
1513 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 9); in QuadDRegs()
1526 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in QuadQRegs() local
1528 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops, 9); in QuadQRegs()
1652 SmallVector<SDValue, 7> Ops; in SelectVLD() local
1658 Ops.push_back(MemAddr); in SelectVLD()
1659 Ops.push_back(Align); in SelectVLD()
1670 Ops.push_back(isa<ConstantSDNode>(Inc.getNode()) ? Reg0 : Inc); in SelectVLD()
1672 Ops.push_back(Pred); in SelectVLD()
1673 Ops.push_back(Reg0); in SelectVLD()
1674 Ops.push_back(Chain); in SelectVLD()
1675 VLd = CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size()); in SelectVLD()
1692 Ops.push_back(SDValue(VLdA, 1)); in SelectVLD()
1693 Ops.push_back(Align); in SelectVLD()
1699 Ops.push_back(Reg0); in SelectVLD()
1701 Ops.push_back(SDValue(VLdA, 0)); in SelectVLD()
1702 Ops.push_back(Pred); in SelectVLD()
1703 Ops.push_back(Reg0); in SelectVLD()
1704 Ops.push_back(Chain); in SelectVLD()
1706 Ops.data(), Ops.size()); in SelectVLD()
1777 SmallVector<SDValue, 7> Ops; in SelectVST() local
1808 Ops.push_back(MemAddr); in SelectVST()
1809 Ops.push_back(Align); in SelectVST()
1820 Ops.push_back(isa<ConstantSDNode>(Inc.getNode()) ? Reg0 : Inc); in SelectVST()
1822 Ops.push_back(SrcReg); in SelectVST()
1823 Ops.push_back(Pred); in SelectVST()
1824 Ops.push_back(Reg0); in SelectVST()
1825 Ops.push_back(Chain); in SelectVST()
1827 CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size()); in SelectVST()
1857 Ops.push_back(SDValue(VStA, 0)); in SelectVST()
1858 Ops.push_back(Align); in SelectVST()
1864 Ops.push_back(Reg0); in SelectVST()
1866 Ops.push_back(RegSeq); in SelectVST()
1867 Ops.push_back(Pred); in SelectVST()
1868 Ops.push_back(Reg0); in SelectVST()
1869 Ops.push_back(Chain); in SelectVST()
1871 Ops.data(), Ops.size()); in SelectVST()
1942 SmallVector<SDValue, 8> Ops; in SelectVLDSTLane() local
1943 Ops.push_back(MemAddr); in SelectVLDSTLane()
1944 Ops.push_back(Align); in SelectVLDSTLane()
1947 Ops.push_back(isa<ConstantSDNode>(Inc.getNode()) ? Reg0 : Inc); in SelectVLDSTLane()
1968 Ops.push_back(SuperReg); in SelectVLDSTLane()
1969 Ops.push_back(getI32Imm(Lane)); in SelectVLDSTLane()
1970 Ops.push_back(Pred); in SelectVLDSTLane()
1971 Ops.push_back(Reg0); in SelectVLDSTLane()
1972 Ops.push_back(Chain); in SelectVLDSTLane()
1977 Ops.data(), Ops.size()); in SelectVLDSTLane()
2039 SmallVector<SDValue, 6> Ops; in SelectVLDDup() local
2040 Ops.push_back(MemAddr); in SelectVLDDup()
2041 Ops.push_back(Align); in SelectVLDDup()
2047 Ops.push_back(Inc); in SelectVLDDup()
2050 Ops.push_back(Reg0); in SelectVLDDup()
2052 Ops.push_back(Pred); in SelectVLDDup()
2053 Ops.push_back(Reg0); in SelectVLDDup()
2054 Ops.push_back(Chain); in SelectVLDDup()
2063 CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size()); in SelectVLDDup()
2102 SmallVector<SDValue, 6> Ops; in SelectVTBL() local
2104 Ops.push_back(N->getOperand(1)); in SelectVTBL()
2105 Ops.push_back(RegSeq); in SelectVTBL()
2106 Ops.push_back(N->getOperand(FirstTblReg + NumVecs)); in SelectVTBL()
2107 Ops.push_back(getAL(CurDAG)); // predicate in SelectVTBL()
2108 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); // predicate register in SelectVTBL()
2109 return CurDAG->getMachineNode(Opc, dl, VT, Ops.data(), Ops.size()); in SelectVTBL()
2139 SDValue Ops[] = { N->getOperand(0).getOperand(0), in SelectV6T2BitfieldExtractOp() local
2143 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectV6T2BitfieldExtractOp()
2162 SDValue Ops[] = { N->getOperand(0).getOperand(0), in SelectV6T2BitfieldExtractOp() local
2166 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectV6T2BitfieldExtractOp()
2192 SDValue Ops[] = { FalseVal, CPTmp0, SOShImm, CC, CCR, InFlag }; in SelectT2CMOVShiftOp() local
2193 return CurDAG->SelectNodeTo(N, Opc, MVT::i32,Ops, 6); in SelectT2CMOVShiftOp()
2206 SDValue Ops[] = { FalseVal, CPTmp0, CPTmp2, CC, CCR, InFlag }; in SelectARMCMOVShiftOp() local
2207 return CurDAG->SelectNodeTo(N, ARM::MOVCCsi, MVT::i32, Ops, 6); in SelectARMCMOVShiftOp()
2212 SDValue Ops[] = { FalseVal, CPTmp0, CPTmp1, CPTmp2, CC, CCR, InFlag }; in SelectARMCMOVShiftOp() local
2213 return CurDAG->SelectNodeTo(N, ARM::MOVCCsr, MVT::i32, Ops, 7); in SelectARMCMOVShiftOp()
2242 SDValue Ops[] = { FalseVal, True, CC, CCR, InFlag }; in SelectT2CMOVImmOp() local
2243 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectT2CMOVImmOp()
2275 SDValue Ops[] = { FalseVal, True, CC, CCR, InFlag }; in SelectARMCMOVImmOp() local
2276 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in SelectARMCMOVImmOp()
2351 SDValue Ops[] = { FalseVal, TrueVal, Tmp2, CCR, InFlag }; in SelectCMOVOp() local
2367 return CurDAG->SelectNodeTo(N, Opc, VT, Ops, 5); in SelectCMOVOp()
2392 SDValue Ops[] = { FalseVal, CPTmp0, CPTmp1, CC, CCR, Reg0, InFlag }; in SelectConditionalOp() local
2393 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 7); in SelectConditionalOp()
2408 SDValue Ops[] = { FalseVal, True, CC, CCR, Reg0, InFlag }; in SelectConditionalOp() local
2409 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 6); in SelectConditionalOp()
2420 SDValue Ops[] = { FalseVal, TrueVal, CC, CCR, Reg0, InFlag }; in SelectConditionalOp() local
2421 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 6); in SelectConditionalOp()
2435 SDValue Ops[] = { FalseVal, CPTmp0, CPTmp2, CC, CCR, Reg0, InFlag }; in SelectConditionalOp() local
2436 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 7); in SelectConditionalOp()
2447 SDValue Ops[] = { FalseVal, CPTmp0, CPTmp1, CPTmp2, CC, CCR, Reg0, InFlag }; in SelectConditionalOp() local
2448 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 8); in SelectConditionalOp()
2463 SDValue Ops[] = { FalseVal, True, CC, CCR, Reg0, InFlag }; in SelectConditionalOp() local
2464 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 6); in SelectConditionalOp()
2475 SDValue Ops[] = { FalseVal, TrueVal, CC, CCR, Reg0, InFlag }; in SelectConditionalOp() local
2476 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 6); in SelectConditionalOp()
2538 SmallVector<SDValue, 6> Ops; in SelectAtomic64() local
2539 Ops.push_back(Node->getOperand(1)); // Ptr in SelectAtomic64()
2540 Ops.push_back(Node->getOperand(2)); // Low part of Val1 in SelectAtomic64()
2541 Ops.push_back(Node->getOperand(3)); // High part of Val1 in SelectAtomic64()
2543 Ops.push_back(Node->getOperand(4)); // Low part of Val2 in SelectAtomic64()
2544 Ops.push_back(Node->getOperand(5)); // High part of Val2 in SelectAtomic64()
2546 Ops.push_back(Node->getOperand(0)); // Chain in SelectAtomic64()
2551 Ops.data() ,Ops.size()); in SelectAtomic64()
2600 SDValue Ops[] = { CPIdx, Pred, PredReg, CurDAG->getEntryNode() }; in Select() local
2602 Ops, 4); in Select()
2604 SDValue Ops[] = { in Select() local
2612 Ops, 5); in Select()
2626 SDValue Ops[] = { TFI, CurDAG->getTargetConstant(0, MVT::i32), in Select() local
2628 return CurDAG->SelectNodeTo(N, ARM::tADDrSPi, MVT::i32, Ops, 4); in Select()
2632 SDValue Ops[] = { TFI, CurDAG->getTargetConstant(0, MVT::i32), in Select() local
2635 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5); in Select()
2661 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG), Reg0, Reg0 }; in Select() local
2662 return CurDAG->SelectNodeTo(N, ARM::t2ADDrs, MVT::i32, Ops, 6); in Select()
2664 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG), Reg0, Reg0 }; in Select() local
2665 return CurDAG->SelectNodeTo(N, ARM::ADDrsi, MVT::i32, Ops, 7); in Select()
2677 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG), Reg0, Reg0 }; in Select() local
2678 return CurDAG->SelectNodeTo(N, ARM::t2RSBrs, MVT::i32, Ops, 6); in Select()
2680 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG), Reg0, Reg0 }; in Select() local
2681 return CurDAG->SelectNodeTo(N, ARM::RSBrsi, MVT::i32, Ops, 7); in Select()
2720 SDValue Ops[] = { N0.getOperand(0), Imm16, in Select() local
2722 return CurDAG->getMachineNode(Opc, dl, VT, Ops, 4); in Select()
2735 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
2738 return CurDAG->getMachineNode(ARM::t2UMULL, dl, MVT::i32, MVT::i32,Ops,4); in Select()
2740 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
2745 dl, MVT::i32, MVT::i32, Ops, 5); in Select()
2752 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
2754 return CurDAG->getMachineNode(ARM::t2SMULL, dl, MVT::i32, MVT::i32,Ops,4); in Select()
2756 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
2761 dl, MVT::i32, MVT::i32, Ops, 5); in Select()
2802 SDValue Ops[] = { N1, Tmp2, N3, Chain, InFlag }; in Select() local
2804 MVT::Glue, Ops, 5); in Select()
2837 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg }; in Select() local
2838 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops, 4); in Select()
2857 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg }; in Select() local
2858 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops, 4); in Select()
2876 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg }; in Select() local
2877 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops, 4); in Select()
3092 SmallVector<SDValue, 7> Ops; in Select() local
3093 Ops.push_back(MemAddr); in Select()
3094 Ops.push_back(getAL(CurDAG)); in Select()
3095 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); in Select()
3096 Ops.push_back(Chain); in Select()
3097 SDNode *Ld = CurDAG->getMachineNode(NewOpc, dl, ResTys, Ops.data(), in Select()
3098 Ops.size()); in Select()
3159 SmallVector<SDValue, 7> Ops; in Select() local
3160 Ops.push_back(Val0); in Select()
3161 Ops.push_back(Val1); in Select()
3162 Ops.push_back(MemAddr); in Select()
3163 Ops.push_back(getAL(CurDAG)); in Select()
3164 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); in Select()
3165 Ops.push_back(Chain); in Select()
3171 SDNode *St = CurDAG->getMachineNode(NewOpc, dl, ResTys, Ops.data(), in Select()
3172 Ops.size()); in Select()
3332 SmallVector<SDValue, 6> Ops; in Select() local
3334 Ops.push_back(N->getOperand(0)); in Select()
3335 Ops.push_back(N->getOperand(1)); in Select()
3336 Ops.push_back(getAL(CurDAG)); // Predicate in Select()
3337 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); // Predicate Register in Select()
3338 return CurDAG->getMachineNode(ARM::VTBL1, dl, VT, Ops.data(), Ops.size()); in Select()
3349 SmallVector<SDValue, 6> Ops; in Select() local
3350 Ops.push_back(RegSeq); in Select()
3351 Ops.push_back(N->getOperand(2)); in Select()
3352 Ops.push_back(getAL(CurDAG)); // Predicate in Select()
3353 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); // Predicate Register in Select()
3355 Ops.data(), Ops.size()); in Select()