Lines Matching refs:VSELECT
767 setOperationAction(ISD::VSELECT, (MVT::SimpleValueType)VT, Expand); in X86TargetLowering()
954 setOperationAction(ISD::VSELECT, MVT::v2f64, Legal); in X86TargetLowering()
955 setOperationAction(ISD::VSELECT, MVT::v2i64, Legal); in X86TargetLowering()
956 setOperationAction(ISD::VSELECT, MVT::v16i8, Legal); in X86TargetLowering()
957 setOperationAction(ISD::VSELECT, MVT::v4i32, Legal); in X86TargetLowering()
958 setOperationAction(ISD::VSELECT, MVT::v4f32, Legal); in X86TargetLowering()
1069 setOperationAction(ISD::VSELECT, MVT::v4f64, Legal); in X86TargetLowering()
1070 setOperationAction(ISD::VSELECT, MVT::v4i64, Legal); in X86TargetLowering()
1071 setOperationAction(ISD::VSELECT, MVT::v8i32, Legal); in X86TargetLowering()
1072 setOperationAction(ISD::VSELECT, MVT::v8f32, Legal); in X86TargetLowering()
1090 setOperationAction(ISD::VSELECT, MVT::v32i8, Legal); in X86TargetLowering()
1212 setTargetDAGCombine(ISD::VSELECT); in X86TargetLowering()
10399 R = DAG.getNode(ISD::VSELECT, dl, VT, OpVSel, M, R); in LowerShift()
10411 R = DAG.getNode(ISD::VSELECT, dl, VT, OpVSel, M, R); in LowerShift()
10419 R = DAG.getNode(ISD::VSELECT, dl, VT, OpVSel, in LowerShift()
13562 if (N->getOpcode() == ISD::VSELECT && DCI.isBeforeLegalizeOps() && in PerformSELECTCombine()
13564 TLI.isOperationLegal(ISD::VSELECT, VT)) { in PerformSELECTCombine()
14201 Mask = DAG.getNode(ISD::VSELECT, DL, BlendVT, Mask, Y, X); in PerformOrCombine()
15086 case ISD::VSELECT: in PerformDAGCombine()